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[PATCH 22/35] target/arm: Handle HCR_EL2 accesses for FEAT_NV2 bits
From: |
Peter Maydell |
Subject: |
[PATCH 22/35] target/arm: Handle HCR_EL2 accesses for FEAT_NV2 bits |
Date: |
Mon, 18 Dec 2023 11:32:52 +0000 |
FEAT_NV2 defines another new bit in HCR_EL2: NV2. When the
feature is enabled, allow this bit to be written in HCR_EL2.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/cpu-features.h | 5 +++++
target/arm/helper.c | 3 +++
2 files changed, 8 insertions(+)
diff --git a/target/arm/cpu-features.h b/target/arm/cpu-features.h
index 3a43c328d9e..7a590c824cf 100644
--- a/target/arm/cpu-features.h
+++ b/target/arm/cpu-features.h
@@ -844,6 +844,11 @@ static inline bool isar_feature_aa64_nv(const
ARMISARegisters *id)
return FIELD_EX64(id->id_aa64mmfr2, ID_AA64MMFR2, NV) != 0;
}
+static inline bool isar_feature_aa64_nv2(const ARMISARegisters *id)
+{
+ return FIELD_EX64(id->id_aa64mmfr2, ID_AA64MMFR2, NV) >= 2;
+}
+
static inline bool isar_feature_aa64_pmuv3p1(const ARMISARegisters *id)
{
return FIELD_EX64(id->id_aa64dfr0, ID_AA64DFR0, PMUVER) >= 4 &&
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 28448624c36..afed58b6f7f 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -5841,6 +5841,9 @@ static void do_hcr_write(CPUARMState *env, uint64_t
value, uint64_t valid_mask)
if (cpu_isar_feature(aa64_nv, cpu)) {
valid_mask |= HCR_NV | HCR_NV1 | HCR_AT;
}
+ if (cpu_isar_feature(aa64_nv2, cpu)) {
+ valid_mask |= HCR_NV2;
+ }
}
if (cpu_isar_feature(any_evt, cpu)) {
--
2.34.1
- [PATCH 10/35] target/arm: *_EL12 registers should UNDEF when HCR_EL2.E2H is 0, (continued)
- [PATCH 10/35] target/arm: *_EL12 registers should UNDEF when HCR_EL2.E2H is 0, Peter Maydell, 2023/12/18
- [PATCH 12/35] target/arm: Move FPU/SVE/SME access checks up above ARM_CP_SPECIAL_MASK check, Peter Maydell, 2023/12/18
- [PATCH 13/35] target/arm: Trap sysreg accesses for FEAT_NV, Peter Maydell, 2023/12/18
- [PATCH 18/35] target/arm: Don't honour PSTATE.PAN when HCR_EL2.{NV, NV1} == {1, 1}, Peter Maydell, 2023/12/18
- [PATCH 19/35] target/arm: Treat LDTR* and STTR* as LDR/STR when NV, NV1 is 1, 1, Peter Maydell, 2023/12/18
- [PATCH 22/35] target/arm: Handle HCR_EL2 accesses for FEAT_NV2 bits,
Peter Maydell <=
- [PATCH 16/35] target/arm: Trap registers when HCR_EL2.{NV, NV1} == {1, 1}, Peter Maydell, 2023/12/18
- [PATCH 15/35] target/arm: Set SPSR_EL1.M correctly when nested virt is enabled, Peter Maydell, 2023/12/18
- [PATCH 14/35] target/arm: Make NV reads of CurrentEL return EL2, Peter Maydell, 2023/12/18
- [PATCH 17/35] target/arm: Always use arm_pan_enabled() when checking if PAN is enabled, Peter Maydell, 2023/12/18
- [PATCH 20/35] target/arm: Handle FEAT_NV page table attribute changes, Peter Maydell, 2023/12/18