[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Stable-7.2.8 08/24] target/arm: Set IL bit for pauth, SVE access, BTI t
From: |
Michael Tokarev |
Subject: |
[Stable-7.2.8 08/24] target/arm: Set IL bit for pauth, SVE access, BTI trap syndromes |
Date: |
Wed, 13 Dec 2023 16:00:17 +0300 |
From: Peter Maydell <peter.maydell@linaro.org>
The syndrome register value always has an IL field at bit 25, which
is 0 for a trap on a 16 bit instruction, and 1 for a trap on a 32
bit instruction (or for exceptions which aren't traps on a known
instruction, like PC alignment faults). This means that our
syn_*() functions should always either take an is_16bit argument to
determine whether to set the IL bit, or else unconditionally set it.
We missed setting the IL bit for the syndrome for three kinds of trap:
* an SVE access exception
* a pointer authentication check failure
* a BTI (branch target identification) check failure
All of these traps are AArch64 only, and so the instruction causing
the trap is always 64 bit. This means we can unconditionally set
the IL bit in the syn_*() function.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20231120150121.3458408-1-peter.maydell@linaro.org
Cc: qemu-stable@nongnu.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
(cherry picked from commit 11a3c4a286d5dc603582ea0a1fca62c2ec0a1aee)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
diff --git a/target/arm/syndrome.h b/target/arm/syndrome.h
index 73df5e3793..15334a3d15 100644
--- a/target/arm/syndrome.h
+++ b/target/arm/syndrome.h
@@ -212,7 +212,7 @@ static inline uint32_t syn_simd_access_trap(int cv, int
cond, bool is_16bit)
static inline uint32_t syn_sve_access_trap(void)
{
- return EC_SVEACCESSTRAP << ARM_EL_EC_SHIFT;
+ return (EC_SVEACCESSTRAP << ARM_EL_EC_SHIFT) | ARM_EL_IL;
}
static inline uint32_t syn_smetrap(SMEExceptionType etype, bool is_16bit)
@@ -223,12 +223,12 @@ static inline uint32_t syn_smetrap(SMEExceptionType
etype, bool is_16bit)
static inline uint32_t syn_pactrap(void)
{
- return EC_PACTRAP << ARM_EL_EC_SHIFT;
+ return (EC_PACTRAP << ARM_EL_EC_SHIFT) | ARM_EL_IL;
}
static inline uint32_t syn_btitrap(int btype)
{
- return (EC_BTITRAP << ARM_EL_EC_SHIFT) | btype;
+ return (EC_BTITRAP << ARM_EL_EC_SHIFT) | ARM_EL_IL | btype;
}
static inline uint32_t syn_bxjtrap(int cv, int cond, int rm)
--
2.39.2
- [Stable-7.2.8 00/24] Patch Round-up for stable 7.2.8, freeze on 2023-12-23, Michael Tokarev, 2023/12/13
- [Stable-7.2.8 01/24] target/arm: Fix SME FMOPA (16-bit), BFMOPA, Michael Tokarev, 2023/12/13
- [Stable-7.2.8 06/24] tests/avocado: Replace assertEquals() for Python 3.12 compatibility, Michael Tokarev, 2023/12/13
- [Stable-7.2.8 08/24] target/arm: Set IL bit for pauth, SVE access, BTI trap syndromes,
Michael Tokarev <=
- [Stable-7.2.8 02/24] hw/ide/ahci: fix legacy software reset, Michael Tokarev, 2023/12/13
- [Stable-7.2.8 04/24] net: Update MemReentrancyGuard for NIC, Michael Tokarev, 2023/12/13
- [Stable-7.2.8 05/24] linux-user: Fix loaddr computation for some elf files, Michael Tokarev, 2023/12/13
- [Stable-7.2.8 03/24] net: Provide MemReentrancyGuard * to qemu_new_nic(), Michael Tokarev, 2023/12/13
- [Stable-7.2.8 07/24] tests/avocado: Replace assertRegexpMatches() for Python 3.12 compatibility, Michael Tokarev, 2023/12/13
- [Stable-7.2.8 12/24] hw/nvram/xlnx-efuse-ctrl: Free XlnxVersalEFuseCtrl[] "pg0-lock" array, Michael Tokarev, 2023/12/13
- [Stable-7.2.8 09/24] hw/virtio: Free VirtIOIOMMUPCI::vdev.reserved_regions[] on finalize(), Michael Tokarev, 2023/12/13
- [Stable-7.2.8 10/24] hw/misc/mps2-scc: Free MPS2SCC::oscclk[] array on finalize(), Michael Tokarev, 2023/12/13
- [Stable-7.2.8 11/24] hw/nvram/xlnx-efuse: Free XlnxEFuse::ro_bits[] array on finalize(), Michael Tokarev, 2023/12/13
- [Stable-7.2.8 13/24] hw/virtio: Add VirtioPCIDeviceTypeInfo::instance_finalize field, Michael Tokarev, 2023/12/13