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Re: [PATCH-for-8.2 v4 04/10] hw/char/pl011: Extract pl011_write_txdata()


From: Philippe Mathieu-Daudé
Subject: Re: [PATCH-for-8.2 v4 04/10] hw/char/pl011: Extract pl011_write_txdata() from pl011_write()
Date: Wed, 13 Dec 2023 10:13:14 +0100
User-agent: Mozilla Thunderbird

On 10/11/23 00:17, Richard Henderson wrote:
On 11/9/23 11:28, Philippe Mathieu-Daudé wrote:
When implementing FIFO, this code will become more complex.
Start by factoring it out to a new pl011_write_txdata() function.
No functional change intended.

...
@@ -262,19 +273,13 @@ static void pl011_write(void *opaque, hwaddr offset,
                          uint64_t value, unsigned size)
  {
      PL011State *s = (PL011State *)opaque;
-    unsigned char ch;
      trace_pl011_write(offset, value, pl011_regname(offset));
      switch (offset >> 2) {
      case 0: /* UARTDR */
-        /* ??? Check if transmitter is enabled.  */
-        ch = value;
-        /* XXX this blocks entire thread. Rewrite to use
-         * qemu_chr_fe_write and background I/O callbacks */
-        qemu_chr_fe_write_all(&s->chr, &ch, 1);
-        s->int_level |= INT_TX;
-        pl011_update(s);
+        s->readbuff = value;

Why the write to readbuff?

I think I wanted to use it when FIFO is disabled due to:

https://developer.arm.com/documentation/ddi0183/g/programmers-model/register-descriptions/line-control-register--uartlcr-h?lang=en

UARTLCR_H.FEN:

  Enable FIFOs:

  0 = FIFOs are disabled (character mode) that is, the FIFOs become
      1-byte-deep holding registers

  1 = transmit and receive FIFO buffers are enabled (FIFO mode).

and we don't have a fifo8_change_capacity() method.

Otherwise, not sure what for is this field... I'll see if we can
just remove it.




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