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[PATCH 17/33] hw/cpu/arm: Document more properties of CORTEX_MPCORE_PRIV
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH 17/33] hw/cpu/arm: Document more properties of CORTEX_MPCORE_PRIV QOM type |
Date: |
Tue, 12 Dec 2023 17:29:17 +0100 |
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/cpu/cortex_mpcore.h | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/include/hw/cpu/cortex_mpcore.h b/include/hw/cpu/cortex_mpcore.h
index 4697fd47c7..73627bc415 100644
--- a/include/hw/cpu/cortex_mpcore.h
+++ b/include/hw/cpu/cortex_mpcore.h
@@ -28,10 +28,17 @@
* some timers and watchdogs
*
* QEMU interface:
+ * + QOM property "cluster-id" which set the cluster ID and its affinity.
* + QOM property "num-cores" which set the number of cores present in
* the cluster.
+ * + QOM property "cpu-type" is the CPU model typename.
* + QOM properties "cpu-has-el3", "cpu-has-el2" which set whether the CPUs
* have the exception level features present.
+ * + QOM properties "cpu-has-vfp-d32", "cpu-has-neon" which set whether the
+ * CPUs have the FPU features present.
+ * + QOM property "cpu-freq-hz" is the frequency of each core
+ * + QOM property "cpu-memory" is a MemoryRegion containing the devices
+ * provided by the board model.
* + QOM property "gic-spi-num" sets the number of GIC Shared Peripheral
* Interrupts.
* QEMU interface forwarded from the GIC:
--
2.41.0
- [PATCH 07/33] hw/cpu/arm: Alias 'num-cpu' property on TYPE_REALVIEW_MPCORE, (continued)
- [PATCH 07/33] hw/cpu/arm: Alias 'num-cpu' property on TYPE_REALVIEW_MPCORE, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 08/33] hw/cpu/arm: Declare CPU QOM types using DEFINE_TYPES() macro, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 09/33] hw/cpu/arm: Merge {a9mpcore.h, a15mpcore.h} as cortex_mpcore.h, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 10/33] hw/cpu/arm: Introduce abstract CORTEX_MPCORE_PRIV QOM type, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 11/33] hw/cpu/arm: Have A9MPCORE/A15MPCORE inheritate common CORTEX_MPCORE_PRIV, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 13/33] hw/cpu/arm: Handle 'num_cores' property once in MPCore parent, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 12/33] hw/cpu/arm: Create MPCore container in QOM parent, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 14/33] hw/cpu/arm: Handle 'has_el2/3' properties once in MPCore parent, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 15/33] hw/cpu/arm: Handle 'gic-irq' property once in MPCore parent, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 16/33] hw/cpu/arm: Handle GIC once in MPCore parent, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 17/33] hw/cpu/arm: Document more properties of CORTEX_MPCORE_PRIV QOM type,
Philippe Mathieu-Daudé <=
- [PATCH 19/33] hw/cpu/arm: Introduce TYPE_A7MPCORE_PRIV for Cortex-A7 MPCore, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 18/33] hw/cpu/arm: Replace A15MPPrivState by CortexMPPrivState, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 21/33] hw/cpu/arm: Create CPUs once in MPCore parent, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 22/33] hw/arm/aspeed_ast2600: Let the A7MPcore create/wire the CPU cores, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 20/33] hw/cpu/arm: Consolidate check on max GIC spi supported, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 23/33] hw/arm/exynos4210: Let the A9MPcore create/wire the CPU cores, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 24/33] hw/arm/fsl-imx6: Let the A9MPcore create/wire the CPU cores, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 25/33] hw/arm/fsl-imx6ul: Let the A7MPcore create/wire the CPU cores, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 26/33] hw/arm/fsl-imx7: Let the A7MPcore create/wire the CPU cores, Philippe Mathieu-Daudé, 2023/12/12
- [PATCH 27/33] hw/arm/highbank: Let the A9/A15MPcore create/wire the CPU cores, Philippe Mathieu-Daudé, 2023/12/12