[PATCH 0/2] Add support for (ratified) Zacas extension

[Rob Bradford]

The Zacas extension is now ratified:
https://github.com/riscv/riscv-zacas

This series uses a patch from Weiwei Li from:
https://github.com/plctlab/plct-qemu/tree/plct-zacas-dev with the
following changes:

* Fixed destination register (looks like a copy and paste error),
* Fixed extension name enabling,
* Minor coding style fixes,
* Updated for new extension handling & cpu.h header split.

This patch was mentioned on the list here:
https://www.mail-archive.com/qemu-devel@nongnu.org/msg970280.html

The series was tested against riscv-tests from the following PR:
https://github.com/riscv-software-src/riscv-tests/pull/492

Rob Bradford (1):
  disas/riscv: Add amocas.[w,d,q] instructions

Weiwei Li (1):
  target/riscv: Add support for Zacas extension

 disas/riscv.c                               |   9 ++
 target/riscv/cpu.c                          |   2 +
 target/riscv/cpu_cfg.h                      |   1 +
 target/riscv/insn32.decode                  |   6 +
 target/riscv/insn_trans/trans_rvzacas.c.inc | 150 ++++++++++++++++++++
 target/riscv/tcg/tcg-cpu.c                  |   5 +
 target/riscv/translate.c                    |   1 +
 7 files changed, 174 insertions(+)
 create mode 100644 target/riscv/insn_trans/trans_rvzacas.c.inc

-- 
2.43.0