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[PATCH 33/45] Connect RNG200, PCIE and GENET to GIC
From: |
Sergey Kambalin |
Subject: |
[PATCH 33/45] Connect RNG200, PCIE and GENET to GIC |
Date: |
Sun, 3 Dec 2023 15:28:53 -0600 |
Signed-off-by: Sergey Kambalin <sergey.kambalin@auriga.com>
---
hw/arm/bcm2838.c | 19 +++++++++++++++++++
include/hw/arm/bcm2838_peripherals.h | 2 ++
2 files changed, 21 insertions(+)
diff --git a/hw/arm/bcm2838.c b/hw/arm/bcm2838.c
index 89cd9d5d8c..83f84b22ad 100644
--- a/hw/arm/bcm2838.c
+++ b/hw/arm/bcm2838.c
@@ -210,6 +210,10 @@ static void bcm2838_realize(DeviceState *dev, Error **errp)
sysbus_connect_irq(SYS_BUS_DEVICE(&ps_base->dwc2), 0,
qdev_get_gpio_in(gicdev, GIC_SPI_INTERRUPT_DWC2));
+ /* Connect RNG200 to the interrupt controller */
+ sysbus_connect_irq(SYS_BUS_DEVICE(&ps->rng200), 0,
+ qdev_get_gpio_in(gicdev, GIC_SPI_INTERRUPT_RNG200));
+
/* Connect DMA 0-6 to the interrupt controller */
for (int_n = GIC_SPI_INTERRUPT_DMA_0; int_n <= GIC_SPI_INTERRUPT_DMA_6;
int_n++) {
@@ -232,6 +236,21 @@ static void bcm2838_realize(DeviceState *dev, Error **errp)
qdev_connect_gpio_out(dma_9_10_irq_orgate, 0,
qdev_get_gpio_in(gicdev,
GIC_SPI_INTERRUPT_DMA_9_10));
+ /* Connect PCIe host bridge to the interrupt controller */
+ for (n = 0; n < BCM2838_PCIE_NUM_IRQS; n++) {
+ int_n = GIC_SPI_INTERRUPT_PCI_INT_A + n;
+ sysbus_connect_irq(SYS_BUS_DEVICE(&ps->pcie_host), n,
+ qdev_get_gpio_in(gicdev, int_n));
+ bcm2838_pcie_host_set_irq_num(BCM2838_PCIE_HOST(&ps->pcie_host), n,
+ int_n);
+ }
+
+ /* Connect Gigabit Ethernet controller to the interrupt controller */
+ sysbus_connect_irq(SYS_BUS_DEVICE(&ps->genet), 0,
+ qdev_get_gpio_in(gicdev, GIC_SPI_INTERRUPT_GENET_A));
+ sysbus_connect_irq(SYS_BUS_DEVICE(&ps->genet), 1,
+ qdev_get_gpio_in(gicdev, GIC_SPI_INTERRUPT_GENET_B));
+
/* Pass through inbound GPIO lines to the GIC */
qdev_init_gpio_in(dev, bcm2838_gic_set_irq, GIC_NUM_IRQS);
diff --git a/include/hw/arm/bcm2838_peripherals.h
b/include/hw/arm/bcm2838_peripherals.h
index 1cfcf5dcce..cdeb892f04 100644
--- a/include/hw/arm/bcm2838_peripherals.h
+++ b/include/hw/arm/bcm2838_peripherals.h
@@ -17,6 +17,8 @@
#include "hw/sd/sdhci.h"
#include "hw/gpio/bcm2838_gpio.h"
+#define GENET_OFFSET 0x1580000
+
/* SPI */
#define GIC_SPI_INTERRUPT_MBOX 33
#define GIC_SPI_INTERRUPT_MPHI 40
--
2.34.1
- [PATCH 23/45] Add GENET register structs. Part 1, (continued)
- [PATCH 23/45] Add GENET register structs. Part 1, Sergey Kambalin, 2023/12/03
- [PATCH 24/45] Add GENET register structs. Part 2, Sergey Kambalin, 2023/12/03
- [PATCH 25/45] Add GENET register structs. Part 3, Sergey Kambalin, 2023/12/03
- [PATCH 26/45] Add GENET register structs. Part 4, Sergey Kambalin, 2023/12/03
- [PATCH 27/45] Add GENET register access macros, Sergey Kambalin, 2023/12/03
- [PATCH 28/45] Implement GENET register ops, Sergey Kambalin, 2023/12/03
- [PATCH 29/45] Implement GENET MDIO, Sergey Kambalin, 2023/12/03
- [PATCH 30/45] Implement GENET TX path, Sergey Kambalin, 2023/12/03
- [PATCH 31/45] Implement GENET RX path, Sergey Kambalin, 2023/12/03
- [PATCH 32/45] Enable BCM2838 GENET controller, Sergey Kambalin, 2023/12/03
- [PATCH 33/45] Connect RNG200, PCIE and GENET to GIC,
Sergey Kambalin <=
- [PATCH 34/45] Add Rpi4b boot tests, Sergey Kambalin, 2023/12/03
- [PATCH 35/45] Add mailbox test stub, Sergey Kambalin, 2023/12/03
- [PATCH 36/45] Add mailbox test constants, Sergey Kambalin, 2023/12/03
- [PATCH 37/45] Add mailbox tests tags. Part 1, Sergey Kambalin, 2023/12/03
- [PATCH 38/45] Add mailbox tests tags. Part 2, Sergey Kambalin, 2023/12/03
- [PATCH 39/45] Add mailbox tests tags. Part 3, Sergey Kambalin, 2023/12/03
- [PATCH 40/45] Add mailbox property tests. Part 1, Sergey Kambalin, 2023/12/03
- [PATCH 41/45] Add mailbox property tests. Part 2, Sergey Kambalin, 2023/12/03
- [PATCH 42/45] Add mailbox property tests. Part 3, Sergey Kambalin, 2023/12/03
- [PATCH 43/45] Add missed BCM2835 properties, Sergey Kambalin, 2023/12/03