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[PATCH qemu v3 04/20] Fixing the basic functionality of STM32 timers


From: ~lbryndza
Subject: [PATCH qemu v3 04/20] Fixing the basic functionality of STM32 timers
Date: Sat, 02 Dec 2023 13:11:07 +0100

From: Lucjan Bryndza <lbryndza.oss@icloud.com>

The current implementation of timers does not work properly
even in basic functionality. A counter configured to report
an interrupt every 10ms reports the first interrupts after a
few seconds.  There are also no properly implemented count up an
count down modes. This commit fixes bugs with interrupt
reporting and implements the basic modes of the counter's
time-base block.

Add stm32 timer set counter function

Signed-off-by: Lucjan Bryndza <lbryndza.oss@icloud.com>
---
 hw/timer/stm32f2xx_timer.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/hw/timer/stm32f2xx_timer.c b/hw/timer/stm32f2xx_timer.c
index 0c5586cb8b..9261090b84 100644
--- a/hw/timer/stm32f2xx_timer.c
+++ b/hw/timer/stm32f2xx_timer.c
@@ -59,6 +59,16 @@ static uint32_t 
stm32f2xx_timer_get_count(STM32F2XXTimerState *s)
 }
 
 
+static void stm32f2xx_timer_set_count(STM32F2XXTimerState *s, uint32_t cnt)
+{
+    if (s->count_mode == TIMER_UP_COUNT) {
+        ptimer_set_count(s->timer, s->tim_arr - (cnt & 0xffff));
+    } else {
+        ptimer_set_count(s->timer, cnt & 0xffff);
+    }
+}
+
+
 static void stm32f2xx_timer_reset(DeviceState *dev)
 {
     STM32F2XXTimerState *s = STM32F2XXTIMER(dev);
-- 
2.38.5




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