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[PULL 4/8] hw/core/machine: Constify MachineClass::valid_cpu_types[]
From: |
Peter Maydell |
Subject: |
[PULL 4/8] hw/core/machine: Constify MachineClass::valid_cpu_types[] |
Date: |
Tue, 21 Nov 2023 10:24:37 +0000 |
From: Gavin Shan <gshan@redhat.com>
Constify MachineClass::valid_cpu_types[i], as suggested by Richard
Henderson.
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20231117071704.35040-2-philmd@linaro.org
[PMD: Constify HPPA machines,
restrict valid_cpu_types to machine_class_init() handlers]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/boards.h | 2 +-
hw/hppa/machine.c | 22 ++++++++++------------
hw/m68k/q800.c | 11 +++++------
3 files changed, 16 insertions(+), 19 deletions(-)
diff --git a/include/hw/boards.h b/include/hw/boards.h
index a7359992980..da85f86efb9 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -273,7 +273,7 @@ struct MachineClass {
bool has_hotpluggable_cpus;
bool ignore_memory_transaction_failures;
int numa_mem_align_shift;
- const char **valid_cpu_types;
+ const char * const *valid_cpu_types;
strList *allowed_dynamic_sysbus_devices;
bool auto_enable_numa_with_memhp;
bool auto_enable_numa_with_memdev;
diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
index 9d08f39490e..c8da7c18d53 100644
--- a/hw/hppa/machine.c
+++ b/hw/hppa/machine.c
@@ -672,19 +672,18 @@ static void hppa_nmi(NMIState *n, int cpu_index, Error
**errp)
}
}
-static const char *HP_B160L_machine_valid_cpu_types[] = {
- TYPE_HPPA_CPU,
- NULL
-};
-
static void HP_B160L_machine_init_class_init(ObjectClass *oc, void *data)
{
+ static const char * const valid_cpu_types[] = {
+ TYPE_HPPA_CPU,
+ NULL
+ };
MachineClass *mc = MACHINE_CLASS(oc);
NMIClass *nc = NMI_CLASS(oc);
mc->desc = "HP B160L workstation";
mc->default_cpu_type = TYPE_HPPA_CPU;
- mc->valid_cpu_types = HP_B160L_machine_valid_cpu_types;
+ mc->valid_cpu_types = valid_cpu_types;
mc->init = machine_HP_B160L_init;
mc->reset = hppa_machine_reset;
mc->block_default_type = IF_SCSI;
@@ -709,19 +708,18 @@ static const TypeInfo HP_B160L_machine_init_typeinfo = {
},
};
-static const char *HP_C3700_machine_valid_cpu_types[] = {
- TYPE_HPPA64_CPU,
- NULL
-};
-
static void HP_C3700_machine_init_class_init(ObjectClass *oc, void *data)
{
+ static const char * const valid_cpu_types[] = {
+ TYPE_HPPA64_CPU,
+ NULL
+ };
MachineClass *mc = MACHINE_CLASS(oc);
NMIClass *nc = NMI_CLASS(oc);
mc->desc = "HP C3700 workstation";
mc->default_cpu_type = TYPE_HPPA64_CPU;
- mc->valid_cpu_types = HP_C3700_machine_valid_cpu_types;
+ mc->valid_cpu_types = valid_cpu_types;
mc->init = machine_HP_C3700_init;
mc->reset = hppa_machine_reset;
mc->block_default_type = IF_SCSI;
diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c
index 1d7cd5ff1c3..83d1571d02f 100644
--- a/hw/m68k/q800.c
+++ b/hw/m68k/q800.c
@@ -726,19 +726,18 @@ static GlobalProperty hw_compat_q800[] = {
};
static const size_t hw_compat_q800_len = G_N_ELEMENTS(hw_compat_q800);
-static const char *q800_machine_valid_cpu_types[] = {
- M68K_CPU_TYPE_NAME("m68040"),
- NULL
-};
-
static void q800_machine_class_init(ObjectClass *oc, void *data)
{
+ static const char * const valid_cpu_types[] = {
+ M68K_CPU_TYPE_NAME("m68040"),
+ NULL
+ };
MachineClass *mc = MACHINE_CLASS(oc);
mc->desc = "Macintosh Quadra 800";
mc->init = q800_machine_init;
mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040");
- mc->valid_cpu_types = q800_machine_valid_cpu_types;
+ mc->valid_cpu_types = valid_cpu_types;
mc->max_cpus = 1;
mc->block_default_type = IF_SCSI;
mc->default_ram_id = "m68k_mac.ram";
--
2.34.1
- [PULL 0/8] target-arm queue, Peter Maydell, 2023/11/21
- [PULL 1/8] target/arm: enable FEAT_RNG on Neoverse-N2, Peter Maydell, 2023/11/21
- [PULL 2/8] hw/intc/arm_gicv3: ICC_PMR_EL1 high bits should be RAZ, Peter Maydell, 2023/11/21
- [PULL 3/8] target/arm: Fix SME FMOPA (16-bit), BFMOPA, Peter Maydell, 2023/11/21
- [PULL 5/8] hw/arm/stm32f405: Report error when incorrect CPU is used, Peter Maydell, 2023/11/21
- [PULL 6/8] hw/arm/stm32f205: Report error when incorrect CPU is used, Peter Maydell, 2023/11/21
- [PULL 4/8] hw/core/machine: Constify MachineClass::valid_cpu_types[],
Peter Maydell <=
- [PULL 7/8] hw/arm/stm32f100: Report error when incorrect CPU is used, Peter Maydell, 2023/11/21
- [PULL 8/8] hw/arm/fsl-imx: Do not ignore Error argument, Peter Maydell, 2023/11/21
- Re: [PULL 0/8] target-arm queue, Stefan Hajnoczi, 2023/11/21