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[PATCH v2 8/8] target/loongarch: Add avail_IOCSR to check iocsr instruct
From: |
Song Gao |
Subject: |
[PATCH v2 8/8] target/loongarch: Add avail_IOCSR to check iocsr instructions |
Date: |
Fri, 11 Aug 2023 18:02:08 +0800 |
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
.../loongarch/insn_trans/trans_privileged.c.inc | 16 ++++++++--------
target/loongarch/translate.h | 2 +-
2 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/target/loongarch/insn_trans/trans_privileged.c.inc
b/target/loongarch/insn_trans/trans_privileged.c.inc
index 099cd871f0..4cb701b4b5 100644
--- a/target/loongarch/insn_trans/trans_privileged.c.inc
+++ b/target/loongarch/insn_trans/trans_privileged.c.inc
@@ -312,14 +312,14 @@ static bool gen_iocsrwr(DisasContext *ctx, arg_rr *a,
return true;
}
-TRANS(iocsrrd_b, ALL, gen_iocsrrd, gen_helper_iocsrrd_b)
-TRANS(iocsrrd_h, ALL, gen_iocsrrd, gen_helper_iocsrrd_h)
-TRANS(iocsrrd_w, ALL, gen_iocsrrd, gen_helper_iocsrrd_w)
-TRANS(iocsrrd_d, ALL, gen_iocsrrd, gen_helper_iocsrrd_d)
-TRANS(iocsrwr_b, ALL, gen_iocsrwr, gen_helper_iocsrwr_b)
-TRANS(iocsrwr_h, ALL, gen_iocsrwr, gen_helper_iocsrwr_h)
-TRANS(iocsrwr_w, ALL, gen_iocsrwr, gen_helper_iocsrwr_w)
-TRANS(iocsrwr_d, ALL, gen_iocsrwr, gen_helper_iocsrwr_d)
+TRANS(iocsrrd_b, IOCSR, gen_iocsrrd, gen_helper_iocsrrd_b)
+TRANS(iocsrrd_h, IOCSR, gen_iocsrrd, gen_helper_iocsrrd_h)
+TRANS(iocsrrd_w, IOCSR, gen_iocsrrd, gen_helper_iocsrrd_w)
+TRANS(iocsrrd_d, IOCSR, gen_iocsrrd, gen_helper_iocsrrd_d)
+TRANS(iocsrwr_b, IOCSR, gen_iocsrwr, gen_helper_iocsrwr_b)
+TRANS(iocsrwr_h, IOCSR, gen_iocsrwr, gen_helper_iocsrwr_h)
+TRANS(iocsrwr_w, IOCSR, gen_iocsrwr, gen_helper_iocsrwr_w)
+TRANS(iocsrwr_d, IOCSR, gen_iocsrwr, gen_helper_iocsrwr_d)
static void check_mmu_idx(DisasContext *ctx)
{
diff --git a/target/loongarch/translate.h b/target/loongarch/translate.h
index db46e9aa0f..89b49a859e 100644
--- a/target/loongarch/translate.h
+++ b/target/loongarch/translate.h
@@ -23,7 +23,7 @@
#define avail_LSPW(C) (FIELD_EX32((C)->cpucfg2, CPUCFG2, LSPW))
#define avail_LAM(C) (FIELD_EX32((C)->cpucfg2, CPUCFG2, LAM))
#define avail_LSX(C) (FIELD_EX32((C)->cpucfg2, CPUCFG2, LSX))
-
+#define avail_IOCSR(C) (FIELD_EX32((C)->cpucfg1, CPUCFG1, IOCSR))
/*
* If an operation is being performed on less than TARGET_LONG_BITS,
--
2.39.1
- [PATCH v2 0/8] Add some checks before translating instructions, Song Gao, 2023/08/11
- [PATCH v2 1/8] target/loongarch: Fix loongarch_la464_initfn() misses setting LSPW., Song Gao, 2023/08/11
- [PATCH v2 3/8] target/loongarch: Add avail_64 to check la64-only instructions, Song Gao, 2023/08/11
- [PATCH v2 5/8] target/loongarch: Add avail_LSPW to check LSPW instructions, Song Gao, 2023/08/11
- [PATCH v2 6/8] target/loongarch: Add avail_LAM to check atomic instructions, Song Gao, 2023/08/11
- [PATCH v2 8/8] target/loongarch: Add avail_IOCSR to check iocsr instructions,
Song Gao <=
- [PATCH v2 4/8] target/loongarch: Add avail_FP/FP_SP/FP_DP to check fpu instructions, Song Gao, 2023/08/11
- [PATCH v2 2/8] target/loongarch: Add a check parameter to the TRANS macro, Song Gao, 2023/08/11
- [PATCH v2 7/8] target/loongarch: Add avail_LSX to check LSX instructions, Song Gao, 2023/08/11