[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 43/54] target/riscv/kvm.c: init 'misa_ext_mask' with scratch CPU
From: |
Alistair Francis |
Subject: |
[PULL 43/54] target/riscv/kvm.c: init 'misa_ext_mask' with scratch CPU |
Date: |
Mon, 10 Jul 2023 22:31:54 +1000 |
From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
At this moment we're retrieving env->misa_ext during
kvm_arch_init_cpu(), leaving env->misa_ext_mask behind.
We want to set env->misa_ext_mask, and we want to set it as early as
possible. The reason is that we're going to use it in the validation
process of the KVM MISA properties we're going to add next. Setting it
during arch_init_cpu() is too late for user validation.
Move the code to a new helper that is going to be called during init()
time, via kvm_riscv_init_user_properties(), like we're already doing for
the machine ID properties. Set both misa_ext and misa_ext_mask to the
same value retrieved by the 'isa' config reg.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20230706101738.460804-11-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/kvm.c | 34 +++++++++++++++++++++++-----------
1 file changed, 23 insertions(+), 11 deletions(-)
diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c
index f264286d51..0d19267010 100644
--- a/target/riscv/kvm.c
+++ b/target/riscv/kvm.c
@@ -396,6 +396,28 @@ static void kvm_riscv_init_machine_ids(RISCVCPU *cpu,
KVMScratchCPU *kvmcpu)
}
}
+static void kvm_riscv_init_misa_ext_mask(RISCVCPU *cpu,
+ KVMScratchCPU *kvmcpu)
+{
+ CPURISCVState *env = &cpu->env;
+ struct kvm_one_reg reg;
+ int ret;
+
+ reg.id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG,
+ KVM_REG_RISCV_CONFIG_REG(isa));
+ reg.addr = (uint64_t)&env->misa_ext_mask;
+ ret = ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, ®);
+
+ if (ret) {
+ error_report("Unable to fetch ISA register from KVM, "
+ "error %d", ret);
+ kvm_riscv_destroy_scratch_vcpu(kvmcpu);
+ exit(EXIT_FAILURE);
+ }
+
+ env->misa_ext = env->misa_ext_mask;
+}
+
void kvm_riscv_init_user_properties(Object *cpu_obj)
{
RISCVCPU *cpu = RISCV_CPU(cpu_obj);
@@ -406,6 +428,7 @@ void kvm_riscv_init_user_properties(Object *cpu_obj)
}
kvm_riscv_init_machine_ids(cpu, &kvmcpu);
+ kvm_riscv_init_misa_ext_mask(cpu, &kvmcpu);
kvm_riscv_destroy_scratch_vcpu(&kvmcpu);
}
@@ -525,21 +548,10 @@ static int kvm_vcpu_set_machine_ids(RISCVCPU *cpu,
CPUState *cs)
int kvm_arch_init_vcpu(CPUState *cs)
{
int ret = 0;
- target_ulong isa;
RISCVCPU *cpu = RISCV_CPU(cs);
- CPURISCVState *env = &cpu->env;
- uint64_t id;
qemu_add_vm_change_state_handler(kvm_riscv_vm_state_change, cs);
- id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG,
- KVM_REG_RISCV_CONFIG_REG(isa));
- ret = kvm_get_one_reg(cs, id, &isa);
- if (ret) {
- return ret;
- }
- env->misa_ext = isa;
-
if (!object_dynamic_cast(OBJECT(cpu), TYPE_RISCV_CPU_HOST)) {
ret = kvm_vcpu_set_machine_ids(cpu, cs);
}
--
2.40.1
- [PULL 32/54] target/riscv KVM_RISCV_SET_TIMER macro is not configured correctly, (continued)
- [PULL 32/54] target/riscv KVM_RISCV_SET_TIMER macro is not configured correctly, Alistair Francis, 2023/07/10
- [PULL 33/54] riscv: Generate devicetree only after machine initialization is complete, Alistair Francis, 2023/07/10
- [PULL 34/54] hw/riscv: virt: Convert fdt_load_addr to uint64_t, Alistair Francis, 2023/07/10
- [PULL 36/54] hw/riscv/virt.c: skip 'mmu-type' FDT if satp mode not set, Alistair Francis, 2023/07/10
- [PULL 37/54] target/riscv/cpu.c: restrict 'mvendorid' value, Alistair Francis, 2023/07/10
- [PULL 38/54] target/riscv/cpu.c: restrict 'mimpid' value, Alistair Francis, 2023/07/10
- [PULL 40/54] target/riscv: use KVM scratch CPUs to init KVM properties, Alistair Francis, 2023/07/10
- [PULL 42/54] target/riscv: handle mvendorid/marchid/mimpid for KVM CPUs, Alistair Francis, 2023/07/10
- [PULL 39/54] target/riscv/cpu.c: restrict 'marchid' value, Alistair Francis, 2023/07/10
- [PULL 41/54] target/riscv: read marchid/mimpid in kvm_riscv_init_machine_ids(), Alistair Francis, 2023/07/10
- [PULL 43/54] target/riscv/kvm.c: init 'misa_ext_mask' with scratch CPU,
Alistair Francis <=
- [PULL 44/54] target/riscv/cpu: add misa_ext_info_arr[], Alistair Francis, 2023/07/10
- [PULL 45/54] target/riscv: add KVM specific MISA properties, Alistair Francis, 2023/07/10
- [PULL 47/54] target/riscv/kvm.c: add multi-letter extension KVM properties, Alistair Francis, 2023/07/10
- [PULL 48/54] target/riscv/cpu.c: add satp_mode properties earlier, Alistair Francis, 2023/07/10
- [PULL 46/54] target/riscv/kvm.c: update KVM MISA bits, Alistair Francis, 2023/07/10
- [PULL 49/54] target/riscv/cpu.c: remove priv_ver check from riscv_isa_string_ext(), Alistair Francis, 2023/07/10
- [PULL 50/54] target/riscv/cpu.c: create KVM mock properties, Alistair Francis, 2023/07/10
- [PULL 51/54] target/riscv: update multi-letter extension KVM properties, Alistair Francis, 2023/07/10
- [PULL 52/54] target/riscv/kvm.c: add kvmconfig_get_cfg_addr() helper, Alistair Francis, 2023/07/10
- [PULL 53/54] target/riscv/kvm.c: read/write (cbom|cboz)_blocksize in KVM, Alistair Francis, 2023/07/10