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Re: [PATCH] hw/riscv: virt: Enable booting M-mode or S-mode FW from pfla
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From: |
Andrea Bolognani |
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Subject: |
Re: [PATCH] hw/riscv: virt: Enable booting M-mode or S-mode FW from pflash0 |
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Date: |
Wed, 26 Apr 2023 17:08:21 +0200 |
On Fri, Apr 21, 2023 at 11:31:44PM +0200, Philippe Mathieu-Daudé wrote:
> On 21/4/23 18:48, Andrea Bolognani wrote:
> > For what it's worth, this change seems to go in the right direction
> > by making things similar to other architectures (x86, Arm) so I'd
> > love to see it happen.
>
> Unfortunately another arch that followed the bad example of using
> a R/W device for the CODE region and not a simple ROM.
I'm not sure if that mitigates your concern, but at least when using
libvirt you're usually going to get one R/O pflash for the CODE part
and one R/W pflash for the VARS part.
This is the case today on x86_64 and aarch64, and with this change
the same would be true on riscv64 going forward.
--
Andrea Bolognani / Red Hat / Virtualization