ipi is used to communicate between cpus, this patch modified
loongarch ipi device as percpu deivce, so that there are
2 MemoryRegions with ipi device, rather than 2*cpus
MemoryRegions, which may be large than QDEV_MAX_MMIO if
more cpus are added on loongarch virt machine.
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
hw/intc/loongarch_ipi.c | 32 ++++++++++----------------------
hw/loongarch/virt.c | 12 ++++++------
include/hw/intc/loongarch_ipi.h | 10 ++++------
include/hw/loongarch/virt.h | 1 -
4 files changed, 20 insertions(+), 35 deletions(-)
diff --git a/hw/intc/loongarch_ipi.c b/hw/intc/loongarch_ipi.c
index aa4bf9eb74..0563d83a35 100644
--- a/hw/intc/loongarch_ipi.c
+++ b/hw/intc/loongarch_ipi.c
@@ -201,27 +201,17 @@ static const MemoryRegionOps loongarch_ipi64_ops = {
static void loongarch_ipi_init(Object *obj)
{
- int cpu;
- LoongArchMachineState *lams;
LoongArchIPI *s = LOONGARCH_IPI(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
- Object *machine = qdev_get_machine();
- ObjectClass *mc = object_get_class(machine);
- /* 'lams' should be initialized */
- if (!strcmp(MACHINE_CLASS(mc)->name, "none")) {
- return;
- }
- lams = LOONGARCH_MACHINE(machine);
- for (cpu = 0; cpu < MAX_IPI_CORE_NUM; cpu++) {
- memory_region_init_io(&s->ipi_iocsr_mem[cpu], obj, &loongarch_ipi_ops,
- &lams->ipi_core[cpu], "loongarch_ipi_iocsr", 0x48);
- sysbus_init_mmio(sbd, &s->ipi_iocsr_mem[cpu]);
- memory_region_init_io(&s->ipi64_iocsr_mem[cpu], obj, &loongarch_ipi64_ops,
- &lams->ipi_core[cpu], "loongarch_ipi64_iocsr",
0x118);
- sysbus_init_mmio(sbd, &s->ipi64_iocsr_mem[cpu]);
- qdev_init_gpio_out(DEVICE(obj), &lams->ipi_core[cpu].irq, 1);
- }
+ memory_region_init_io(&s->ipi_iocsr_mem, obj, &loongarch_ipi_ops,
+ &s->ipi_core, "loongarch_ipi_iocsr", 0x48);
+ sysbus_init_mmio(sbd, &s->ipi_iocsr_mem);
+
+ memory_region_init_io(&s->ipi64_iocsr_mem, obj, &loongarch_ipi64_ops,
+ &s->ipi_core, "loongarch_ipi64_iocsr", 0x118);
+ sysbus_init_mmio(sbd, &s->ipi64_iocsr_mem);
+ qdev_init_gpio_out(DEVICE(obj), &s->ipi_core.irq, 1);
}
static const VMStateDescription vmstate_ipi_core = {
@@ -233,7 +223,7 @@ static const VMStateDescription vmstate_ipi_core = {
VMSTATE_UINT32(en, IPICore),
VMSTATE_UINT32(set, IPICore),
VMSTATE_UINT32(clear, IPICore),
- VMSTATE_UINT32_ARRAY(buf, IPICore, MAX_IPI_MBX_NUM * 2),
+ VMSTATE_UINT32_ARRAY(buf, IPICore, 2),
VMSTATE_END_OF_LIST()
}
};
@@ -243,9 +233,7 @@ static const VMStateDescription vmstate_loongarch_ipi = {
.version_id = 0,
.minimum_version_id = 0,
.fields = (VMStateField[]) {
- VMSTATE_STRUCT_ARRAY(ipi_core, LoongArchMachineState,
- MAX_IPI_CORE_NUM, 0,
- vmstate_ipi_core, IPICore),
+ VMSTATE_STRUCT(ipi_core, LoongArchIPI, 0, vmstate_ipi_core, IPICore),
VMSTATE_END_OF_LIST()
}
};
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index f4bf14c1c8..c8a01b1fb6 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -565,9 +565,6 @@ static void loongarch_irq_init(LoongArchMachineState *lams)
CPUState *cpu_state;
int cpu, pin, i, start, num;
- ipi = qdev_new(TYPE_LOONGARCH_IPI);
- sysbus_realize_and_unref(SYS_BUS_DEVICE(ipi), &error_fatal);
-
extioi = qdev_new(TYPE_LOONGARCH_EXTIOI);
sysbus_realize_and_unref(SYS_BUS_DEVICE(extioi), &error_fatal);
@@ -598,15 +595,18 @@ static void loongarch_irq_init(LoongArchMachineState *lams)
lacpu = LOONGARCH_CPU(cpu_state);
env = &(lacpu->env);
+ ipi = qdev_new(TYPE_LOONGARCH_IPI);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(ipi), &error_fatal);
+
/* connect ipi irq to cpu irq */
- qdev_connect_gpio_out(ipi, cpu, qdev_get_gpio_in(cpudev, IRQ_IPI));
+ qdev_connect_gpio_out(ipi, 0, qdev_get_gpio_in(cpudev, IRQ_IPI));
/* IPI iocsr memory region */
memory_region_add_subregion(&env->system_iocsr, SMP_IPI_MAILBOX,
sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi),
- cpu * 2));
+ 0));
memory_region_add_subregion(&env->system_iocsr, MAIL_SEND_ADDR,
sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi),
- cpu * 2 + 1));
+ 1));
/* extioi iocsr memory region */
memory_region_add_subregion(&env->system_iocsr, APIC_BASE,
sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi),
diff --git a/include/hw/intc/loongarch_ipi.h b/include/hw/intc/loongarch_ipi.h
index 0ee48fca55..664e050b92 100644
--- a/include/hw/intc/loongarch_ipi.h
+++ b/include/hw/intc/loongarch_ipi.h
@@ -28,9 +28,6 @@
#define MAIL_SEND_OFFSET 0
#define ANY_SEND_OFFSET (IOCSR_ANY_SEND - IOCSR_MAIL_SEND)
-#define MAX_IPI_CORE_NUM 4
-#define MAX_IPI_MBX_NUM 4
-
#define TYPE_LOONGARCH_IPI "loongarch_ipi"
OBJECT_DECLARE_SIMPLE_TYPE(LoongArchIPI, LOONGARCH_IPI)
@@ -40,14 +37,15 @@ typedef struct IPICore {
uint32_t set;
uint32_t clear;
/* 64bit buf divide into 2 32bit buf */
- uint32_t buf[MAX_IPI_MBX_NUM * 2];
+ uint32_t buf[2];
qemu_irq irq;
} IPICore;
struct LoongArchIPI {
SysBusDevice parent_obj;
- MemoryRegion ipi_iocsr_mem[MAX_IPI_CORE_NUM];
- MemoryRegion ipi64_iocsr_mem[MAX_IPI_CORE_NUM];
+ MemoryRegion ipi_iocsr_mem;
+ MemoryRegion ipi64_iocsr_mem;
+ IPICore ipi_core;
};
#endif
diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
index 7ae8a91229..54a9f595bb 100644
--- a/include/hw/loongarch/virt.h
+++ b/include/hw/loongarch/virt.h
@@ -36,7 +36,6 @@ struct LoongArchMachineState {
/*< private >*/
MachineState parent_obj;
- IPICore ipi_core[MAX_IPI_CORE_NUM];
MemoryRegion lowmem;
MemoryRegion highmem;
MemoryRegion isa_io;