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[PATCH v3 48/57] tcg/ppc: Use atom_and_align_for_opc
From: |
Richard Henderson |
Subject: |
[PATCH v3 48/57] tcg/ppc: Use atom_and_align_for_opc |
Date: |
Tue, 25 Apr 2023 20:31:37 +0100 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/ppc/tcg-target.c.inc | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
index c799d7c52a..743a452981 100644
--- a/tcg/ppc/tcg-target.c.inc
+++ b/tcg/ppc/tcg-target.c.inc
@@ -2037,7 +2037,22 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext
*s, HostAddress *h,
{
TCGLabelQemuLdst *ldst = NULL;
MemOp opc = get_memop(oi);
- unsigned a_bits = get_alignment_bits(opc);
+ MemOp a_bits, atom_a, atom_u;
+
+ /*
+ * Book II, Section 1.4, Single-Copy Atomicity, specifies:
+ *
+ * Before 3.0, "An access that is not atomic is performed as a set of
+ * smaller disjoint atomic accesses. In general, the number and alignment
+ * of these accesses are implementation-dependent." Thus MO_ATOM_IFALIGN.
+ *
+ * As of 3.0, "the non-atomic access is performed as described in
+ * the corresponding list", which matches MO_ATOM_SUBALIGN.
+ */
+ a_bits = atom_and_align_for_opc(s, &atom_a, &atom_u, opc,
+ have_isa_3_00 ? MO_ATOM_SUBALIGN
+ : MO_ATOM_IFALIGN,
+ false);
#ifdef CONFIG_SOFTMMU
int mem_index = get_mmuidx(oi);
--
2.34.1
- [PATCH v3 38/57] tcg/riscv: Support softmmu unaligned accesses, (continued)
- [PATCH v3 38/57] tcg/riscv: Support softmmu unaligned accesses, Richard Henderson, 2023/04/25
- [PATCH v3 37/57] tcg/loongarch64: Support softmmu unaligned accesses, Richard Henderson, 2023/04/25
- [PATCH v3 39/57] tcg: Introduce tcg_target_has_memory_bswap, Richard Henderson, 2023/04/25
- [PATCH v3 40/57] tcg: Add INDEX_op_qemu_{ld,st}_i128, Richard Henderson, 2023/04/25
- [PATCH v3 41/57] tcg: Support TCG_TYPE_I128 in tcg_out_{ld, st}_helper_{args, ret}, Richard Henderson, 2023/04/25
- [PATCH v3 42/57] tcg: Introduce atom_and_align_for_opc, Richard Henderson, 2023/04/25
- [PATCH v3 43/57] tcg/i386: Use atom_and_align_for_opc, Richard Henderson, 2023/04/25
- [PATCH v3 44/57] tcg/aarch64: Use atom_and_align_for_opc, Richard Henderson, 2023/04/25
- [PATCH v3 45/57] tcg/arm: Use atom_and_align_for_opc, Richard Henderson, 2023/04/25
- [PATCH v3 47/57] tcg/mips: Use atom_and_align_for_opc, Richard Henderson, 2023/04/25
- [PATCH v3 48/57] tcg/ppc: Use atom_and_align_for_opc,
Richard Henderson <=
- [PATCH v3 46/57] tcg/loongarch64: Use atom_and_align_for_opc, Richard Henderson, 2023/04/25
- [PATCH v3 49/57] tcg/riscv: Use atom_and_align_for_opc, Richard Henderson, 2023/04/25
- [PATCH v3 50/57] tcg/s390x: Use atom_and_align_for_opc, Richard Henderson, 2023/04/25
- [PATCH v3 51/57] tcg/sparc64: Use atom_and_align_for_opc, Richard Henderson, 2023/04/25
- [PATCH v3 52/57] tcg/i386: Honor 64-bit atomicity in 32-bit mode, Richard Henderson, 2023/04/25
- [PATCH v3 53/57] tcg/i386: Support 128-bit load/store with have_atomic16, Richard Henderson, 2023/04/25
- [PATCH v3 54/57] tcg/aarch64: Rename temporaries, Richard Henderson, 2023/04/25
- [PATCH v3 55/57] tcg/aarch64: Support 128-bit load/store, Richard Henderson, 2023/04/25
- [PATCH v3 56/57] tcg/ppc: Support 128-bit load/store, Richard Henderson, 2023/04/25
- [PATCH v3 57/57] tcg/s390x: Support 128-bit load/store, Richard Henderson, 2023/04/25