Re: [PATCH] accel/tcg/tcg-accel-ops-rr: ensure fairness with icount

[Peter Maydell]

On Fri, 14 Apr 2023 at 15:48, Jamie Iles <quic_jiles@quicinc.com> wrote:
>
> The round-robin scheduler will iterate over the CPU list with an
> assigned budget until the next timer expiry and may exit early because
> of a TB exit.  This is fine under normal operation but with icount
> enabled and SMP it is possible for a CPU to be starved of run time and
> the system live-locks.
>
> For example, booting a riscv64 platform with '-icount
> shift=0,align=off,sleep=on -smp 2' we observe a livelock once the kernel
> has timers enabled and starts performing TLB shootdowns.  In this case
> we have CPU 0 in M-mode with interrupts disabled sending an IPI to CPU
> 1.  As we enter the TCG loop, we assign the icount budget to next timer
> interrupt to CPU 0 and begin executing where the guest is sat in a busy
> loop exhausting all of the budget before we try to execute CPU 1 which
> is the target of the IPI but CPU 1 is left with no budget with which to
> execute and the process repeats.

Coincidentally, I just ran into a fairly similar issue on Arm,
where CPU0 is in a loop waiting for CPU1 to do something
but CPU1 never gets to execute any instructions at all
because it's run out of timeslice. This patch fixes that
livelock for me.

Tested-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM