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From: | Song Gao |
Subject: | Re: [RFC PATCH v2 18/44] target/loongarch: Implement vsat |
Date: | Wed, 19 Apr 2023 17:31:15 +0800 |
User-agent: | Mozilla/5.0 (X11; Linux loongarch64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 |
Hi, Richard
+ tcg_gen_dupi_vec(vece, t1, max);
+ tcg_gen_smin_vec(vece, t, t, t1);
+}
+
+static void do_vsat_s(unsigned vece, uint32_t vd_ofs, uint32_t vj_ofs,
+ int64_t imm, uint32_t oprsz, uint32_t maxsz)
+{
+ static const TCGOpcode vecop_list[] = {
+ INDEX_op_smax_vec, INDEX_op_smin_vec, 0
+ };
+ static const GVecGen2i op[4] = {
+ {
+ .fniv = gen_vsat_s,
+ .fnoi = gen_helper_vsat_b,
+ .opt_opc = vecop_list,
+ .vece = MO_8
+ },
+ {
+ .fniv = gen_vsat_s,
+ .fnoi = gen_helper_vsat_h,
+ .opt_opc = vecop_list,
+ .vece = MO_16
+ },
+ {
+ .fniv = gen_vsat_s,
+ .fnoi = gen_helper_vsat_w,
+ .opt_opc = vecop_list,
+ .vece = MO_32
+ },
+ {
+ .fniv = gen_vsat_s,
+ .fnoi = gen_helper_vsat_d,
+ .opt_opc = vecop_list,
+ .vece = MO_64
+ },
+ };
+
+ tcg_gen_gvec_2i(vd_ofs, vj_ofs, oprsz, maxsz, imm, &op[vece]);
Better to expand imm to max here, rather than both inside gen_vsat_s and the runtime do_vsats_*.
Likewise for the unsigned versions.
I tried to expand imm to max here for the unsigned versions.
{
uint64_t max;
...
static const GVecGen2i op[4] = {
{
//.fniv = gen_vsat_u,
.fnoi = gen_helper_vsat_bu,
.opt_opc = vecop_list,
.vece = MO_8
},
{
//.fniv = gen_vsat_u,
.fnoi = gen_helper_vsat_hu,
.opt_opc = vecop_list,
.vece = MO_16
},
{
//.fniv = gen_vsat_u,
.fnoi = gen_helper_vsat_wu,
.opt_opc = vecop_list,
.vece = MO_32
},
{
//.fniv = gen_vsat_u,
.fnoi = gen_helper_vsat_du,
.opt_opc = vecop_list,
.vece = MO_64
},
};
max = (imm == 0x3f) ? UINT64_MAX : (1ull << (imm + 1))
- 1;
tcg_gen_gvec_2i(vd_ofs, vj_ofs, oprsz, maxsz, max,
&op[vece]);
}
and I got a tcg_debug_assert();
Thread 1 "qemu-loongarch6" received signal SIGABRT, Aborted.
0x00007ffff60b337f in raise () from /lib64/libc.so.6
(gdb) bt
#0 0x00007ffff60b337f in raise () from /lib64/libc.so.6
#1 0x00007ffff609ddb5 in abort () from /lib64/libc.so.6
#2 0x00007ffff609dc89 in __assert_fail_base.cold.0 () from
/lib64/libc.so.6
#3 0x00007ffff60aba76 in __assert_fail () from /lib64/libc.so.6
#4 0x0000555555632fcf in simd_desc (oprsz=16, maxsz=16,
data="" at ../tcg/tcg-op-gvec.c:91
#5 0x000055555563312b in tcg_gen_gvec_2i_ool (dofs=768, aofs=432,
c=0xb20, oprsz=16, maxsz=16, data="" fn=0x5555555b5c00
<gen_helper_vsat_wu>)
at ../tcg/tcg-op-gvec.c:139
#6 0x0000555555636085 in tcg_gen_gvec_2i (dofs=768, aofs=432,
oprsz=16, maxsz=16, c=134217727, g=0x5555559c25b0 <op+112>)
at ../tcg/tcg-op-gvec.c:1316
#7 0x00005555555e1ef5 in do_vsat_u (vece=2, vd_ofs=768,
vj_ofs=432, imm=26, oprsz=16, maxsz=16) at
../target/loongarch/insn_trans/trans_lsx.c.inc:2828
#8 0x00005555555db25e in gvec_vv_i (ctx=0x7fffffffcc00,
a=0x7fffffffcb00, mop=MO_32, func=0x5555555e1e73
<do_vsat_u>) at
../target/loongarch/insn_trans/trans_lsx.c.inc:121
#9 0x00005555555e1f80 in trans_vsat_wu (ctx=0x7fffffffcc00,
a=0x7fffffffcb00) at
../target/loongarch/insn_trans/trans_lsx.c.inc:2833
#10 0x00005555555d2650 in decode (ctx=0x7fffffffcc00,
insn=1932061023) at
libqemu-loongarch64-linux-user.fa.p/decode-insns.c.inc:8967
#11 0x00005555555e8fca in loongarch_tr_translate_insn
(dcbase=0x7fffffffcc00, cs=0x555555a4e5a0) at
../target/loongarch/translate.c:230
#12 0x000055555565e9ae in translator_loop (cpu=0x555555a4e5a0,
tb=0x7fffe409f340 <code_gen_buffer+652051>,
max_insns=0x7fffffffccfc, pc=274886330028, host_pc=0x40008086ac,
ops=0x5555559c0960 <loongarch_tr_ops>,
db=0x7fffffffcc00) at ../accel/tcg/translator.c:84
#13 0x00005555555e91d5 in gen_intermediate_code
(cs=0x555555a4e5a0, tb=0x7fffe409f340
<code_gen_buffer+652051>, max_insns=0x7fffffffccfc,
pc=274886330028, host_pc=0x40008086ac)
at ../target/loongarch/translate.c:286
#14 0x000055555565d38b in setjmp_gen_code (env=0x555555a4e8f0,
tb=0x7fffe409f340 <code_gen_buffer+652051>, pc=274886330028,
host_pc=0x40008086ac, max_insns=0x7fffffffccfc,
ti=0x7fffffffcd18) at ../accel/tcg/translate-all.c:285
#15 0x000055555565d64a in tb_gen_code (cpu=0x555555a4e5a0,
pc=274886330028, cs_base=0, flags=0, cflags=0) at
../accel/tcg/translate-all.c:365
#16 0x00005555556556d6 in cpu_exec_loop (cpu=0x555555a4e5a0,
sc=0x7fffffffce40) at ../accel/tcg/cpu-exec.c:977
#17 0x0000555555655859 in cpu_exec_setjmp (cpu=0x555555a4e5a0,
sc=0x7fffffffce40) at ../accel/tcg/cpu-exec.c:1034
#18 0x00005555556558eb in cpu_exec (cpu=0x555555a4e5a0) at
../accel/tcg/cpu-exec.c:1060
#19 0x00005555555a75da in cpu_loop (env=0x555555a4e8f0) at
../linux-user/loongarch64/cpu_loop.c:22
#20 0x000055555567bc18 in main (argc=5, argv=0x7fffffffd708,
envp=0x7fffffffd738) at ../linux-user/main.c:957
(gdb) frame 4
#4 0x0000555555632fcf in simd_desc (oprsz=16, maxsz=16,
data="" at ../tcg/tcg-op-gvec.c:91
91 tcg_debug_assert(data == sextract32(data, 0,
SIMD_DATA_BITS));
(gdb) p/x data
$1 = 0x7ffffff
(gdb) frame 7
#7 0x00005555555e1ef5 in do_vsat_u (vece=2, vd_ofs=768,
vj_ofs=432, imm=26, oprsz=16, maxsz=16) at
../target/loongarch/insn_trans/trans_lsx.c.inc:2828
2828 tcg_gen_gvec_2i(vd_ofs, vj_ofs, oprsz, maxsz, max,
&op[vece]);
(gdb) p/x max
$2 = 0x7ffffff
qemu-loongarch64: ../tcg/tcg-op-gvec.c:91: simd_desc: Assertion
`data == sextract32(data, 0, (32 - ((0 + 8) + 2)))' failed.
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