Re: [PATCH 0/5] Support both Ethernet interfaces on i.MX6UL and i.MX7

[Guenter Roeck]

On 4/18/23 07:46, Peter Maydell wrote:
> On Tue, 18 Apr 2023 at 15:42, Guenter Roeck <linux@roeck-us.net> wrote:
> > On 4/18/23 05:10, Peter Maydell wrote:
> > > On Wed, 15 Mar 2023 at 14:52, Guenter Roeck <linux@roeck-us.net> wrote:
> > > So I was having a look at this to see if it was reasonably easy to
> > > split out the PHY into its own device object, and I'm a bit confused.
> > > I know basically 0 about MDIO, but wikipedia says that MDIO buses
> > > have one master (the ethernet MAC) and potentially multiple PHYs.
> > > However it looks like this patchset has configurations where
> > > multiple MACs talk to the same MDIO bus. Am I confused about the
> > > patchset, about the hardware, or about what MDIO supports?
> >
> > It is quite similar to I2C, a serial interface with one master/controller
> > and a number of devices (PHYs) connected to it. There is a nice graphic
> > example at https://prodigytechno.com/mdio-management-data-input-output/.
> > Not sure I understand what is confusing about it. Can you explain ?
>
> I guess I don't understand what the topology is for these specific
> SoCs, then. If there's only one master that might be connected
> to multiple PHYs, why does one ethernet device in QEMU need to
> know about the other one? Are the PHYs connected to just that
> first ethernet device, or to both? This bit in your cover letter
> makes it sound like "both ethernet interfaces connect to the same
> MDIO bus which has both PHYs on it":

Yes, that is exactly how it is, similar to the configuration in the picture
at prodigytechno.com. I don't recall what I wrote in the cover letter, but
"Both Ethernet PHYs connect to the same MDIO bus which is connected to one
of the Ethernet MACs" would be the most accurate description I can think of.

> > > The SOC on i.MX6UL and i.MX7 has 2 Ethernet interfaces. The PHY on each may
> > > be connected to separate MDIO busses, or both may be connected on the same
> > > MDIO bus using different PHY addresses.

Each MAC (Ethernet interface, instance of TYPE_IMX_FEC in qemu) has its own
MDIO bus. Currently QEMU assumes that each PHY is connected to the MDIO bus
on its associated MAC interface. That is not the case on the emulated boards,
where all PHYs are connected to a single MDIO bus.

Userspace, when talking to the Ethernet controllers, knows that the PHY
of the second Ethernet controller is connected to the MDIO bus on the first
Ethernet controller. QEMU has to be told about that and otherwise misses that
MDIO commands sent to the second PHY (on the first Ethernet controller)
influence the second MAC interface.

From this exchange I can only assume that my implementation is unacceptable.
All I can say is that it works.

Thanks,
Guenter