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[PATCH v2 17/17] target/riscv: Expose Zvk* and Zvb[b, c] cpu properties
From: |
Lawrence Hunter |
Subject: |
[PATCH v2 17/17] target/riscv: Expose Zvk* and Zvb[b, c] cpu properties |
Date: |
Mon, 17 Apr 2023 14:58:21 +0100 |
From: Nazar Kazakov <nazar.kazakov@codethink.co.uk>
Signed-off-by: Nazar Kazakov <nazar.kazakov@codethink.co.uk>
---
target/riscv/cpu.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 3b754d7e13b..2f71d612725 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1485,6 +1485,16 @@ static Property riscv_cpu_extensions[] = {
DEFINE_PROP_BOOL("x-zvfh", RISCVCPU, cfg.ext_zvfh, false),
DEFINE_PROP_BOOL("x-zvfhmin", RISCVCPU, cfg.ext_zvfhmin, false),
+ /* Vector cryptography extensions */
+ DEFINE_PROP_BOOL("x-zvbb", RISCVCPU, cfg.ext_zvbb, false),
+ DEFINE_PROP_BOOL("x-zvbc", RISCVCPU, cfg.ext_zvbc, false),
+ DEFINE_PROP_BOOL("x-zvkg", RISCVCPU, cfg.ext_zvkg, false),
+ DEFINE_PROP_BOOL("x-zvkned", RISCVCPU, cfg.ext_zvkned, false),
+ DEFINE_PROP_BOOL("x-zvknha", RISCVCPU, cfg.ext_zvknha, false),
+ DEFINE_PROP_BOOL("x-zvknhb", RISCVCPU, cfg.ext_zvknhb, false),
+ DEFINE_PROP_BOOL("x-zvksed", RISCVCPU, cfg.ext_zvksed, false),
+ DEFINE_PROP_BOOL("x-zvksh", RISCVCPU, cfg.ext_zvksh, false),
+
DEFINE_PROP_END_OF_LIST(),
};
--
2.40.0
- Re: [PATCH v2 02/17] target/riscv: Refactor vector-vector translation macro, (continued)
- [PATCH v2 09/17] target/riscv: Add Zvbb ISA extension support, Lawrence Hunter, 2023/04/17
- [PATCH v2 07/17] qemu/bitops.h: Limit rotate amounts, Lawrence Hunter, 2023/04/17
- [PATCH v2 01/17] target/riscv: Refactor some of the generic vector functionality, Lawrence Hunter, 2023/04/17
- [PATCH v2 03/17] target/riscv: Add Zvbc ISA extension support, Lawrence Hunter, 2023/04/17
- [PATCH v2 14/17] crypto: Create sm4_subword, Lawrence Hunter, 2023/04/17
- [PATCH v2 15/17] crypto: Add SM4 constant parameter CK, Lawrence Hunter, 2023/04/17
- [PATCH v2 17/17] target/riscv: Expose Zvk* and Zvb[b, c] cpu properties,
Lawrence Hunter <=
- [PATCH v2 11/17] target/riscv: Add Zvknh ISA extension support, Lawrence Hunter, 2023/04/17
- [PATCH v2 10/17] target/riscv: Add Zvkned ISA extension support, Lawrence Hunter, 2023/04/17
- [PATCH v2 13/17] target/riscv: Add Zvkg ISA extension support, Lawrence Hunter, 2023/04/17
- [PATCH v2 12/17] target/riscv: Add Zvksh ISA extension support, Lawrence Hunter, 2023/04/17
- [PATCH v2 16/17] target/riscv: Add Zvksed ISA extension support, Lawrence Hunter, 2023/04/17