Re: AVX-512 instruction set

[Paolo Bonzini]

On Wed, Apr 12, 2023 at 2:17 PM Alex Bennée <alex.bennee@linaro.org> wrote:
> I don't think there is currently any active effort to add AVX512
> support. There have been various GSoC projects to improve the x86 SIMD
> emulation but I don't think they got merged.

No, there isn't. However, the recent implementation of AVX in QEMU 7.2
is designed to make AVX512 at least doable.

Adding support for AVX512 would be a very large work (at least 1
months full time plus time to get it merged), but not impossible. The
tasks could be something like this:

1. EVEX prefix decoding for AVX and AVX2 instructions
2. operand broadcast
3. VEX encoded mask instruction: kmov, kadd, kxnor, etc
4. other instructions and permutations with mask operands and permutations
5. opmask support including merging and zeroing
6. Disp8*N addressing mode
7. rounding control and exception suppression

It's important that, at any given step, the new functionality is
tested comprehensively.

> > 62 f2 7d 48 18 0d fa 0c 00 00 vbroadcastss 0xcfa(%rip),%zmm1
> >
> > qemu: uncaught target signal 4 (Illegal instruction) - core dumped
> >
> > I like to add support for broadcast and fmadd avx 512 instructions such as 
> > the following one:
> >
> > 62 e2 7d 48 b8 c9     vfmadd231ps %zmm1,%zmm0,%zmm17

Both of these are using a small subset of AVX512 (step 1 above). Both
vbroadcastss and vfmadd231ps are already implemented in QEMU, but not
using ZMM registers.

Unfortunately the base AVX512 functionality is large, and therefore
the above tasks are all needed to claim support for AVX512. On the
other hand, for historical reasons AVX512BW and AVX512VL extensions
are separate but in practice they are easier to just implement at the
same time as basic AVX512; my expectation is that they would come up
almost for free with the rest of the work.

Paolo