qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH] target/riscv: Mask the implicitly enabled extensions in isa_


From: Daniel Henrique Barboza
Subject: Re: [PATCH] target/riscv: Mask the implicitly enabled extensions in isa_string based on priv version
Date: Wed, 12 Apr 2023 10:05:57 -0300
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.1



On 4/7/23 00:30, Weiwei Li wrote:
Using implicitly enabled extensions such as Zca/Zcf/Zcd instead of their
super extensions can simplify the extension related check. However, they
may have higher priv version than their super extensions. So we should mask
them in the isa_string based on priv version to make them invisible to user
if the specified priv version is lower than their minimal priv version.

Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
---

Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>


And I'll fold it into the next version of "[PATCH v6 0/9] target/riscv: rework
CPU extensions validation​" to fix the sifive break I'm experiencing there.



Thanks,


Daniel

  target/riscv/cpu.c | 1 +
  1 file changed, 1 insertion(+)

diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index cb68916fce..1a5099382c 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1709,6 +1709,7 @@ static void riscv_isa_string_ext(RISCVCPU *cpu, char 
**isa_str,
for (i = 0; i < ARRAY_SIZE(isa_edata_arr); i++) {
          if (isa_edata_arr[i].multi_letter &&
+            (cpu->env.priv_ver >= isa_edata_arr[i].min_version) &&
              isa_ext_is_enabled(cpu, &isa_edata_arr[i])) {
              new = g_strconcat(old, "_", isa_edata_arr[i].name, NULL);
              g_free(old);



reply via email to

[Prev in Thread] Current Thread [Next in Thread]