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From: | Philippe Mathieu-Daudé |
Subject: | Re: [PATCH] target/riscv: Restore the predicate() NULL check behavior |
Date: | Wed, 12 Apr 2023 12:08:37 +0200 |
User-agent: | Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.9.1 |
On 12/4/23 03:04, Wu, Fei wrote:
On 4/11/2023 5:02 PM, Bin Meng wrote:When reading a non-existent CSR QEMU should raise illegal instruction exception, but currently it just exits due to the g_assert() check.I verified that 'csrr t3, 0x4' in user space didn't cause qemu exit but raised illegal instruction after applying this patch.
Good candidate to add in tests/tcg/riscv64/ :)
This actually reverts commit 0ee342256af9205e7388efdf193a6d8f1ba1a617, Some comments are also added to indicate that predicate() must be provided for an implemented CSR. Reported-by: Fei Wu <fei2.wu@intel.com> Signed-off-by: Bin Meng <bmeng@tinylab.org> --- target/riscv/csr.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-)
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