Re: [PATCH] target/riscv: Fix Guest Physical Address Translation

[Alistair Francis]

On Wed, Mar 29, 2023 at 3:53 AM Irina Ryapolova
<irina.ryapolova@syntacore.com> wrote:
>
> According to specification:
> For Sv39x4, address bits of the guest physical address 63:41 must all be 
> zeros, or else a
> guest-page-fault exception occurs.
>
> Likewise for Sv48x4 and Sv57x4.
> For Sv48x4 address bits 63:50 must all be zeros, or else a guest-page-fault 
> exception occurs.
> For Sv57x4 address bits 63:59 must all be zeros, or else a guest-page-fault 
> exception occurs.

I don't follow

The current code enforces that the bits are 0 with this check:

    if (masked_msbs != 0 && masked_msbs != mask) {
        return TRANSLATE_FAIL;
    }

It seems like you are removing the mask from calculating masked_msbs,
but the commit message doesn't really mention that.

Do you mind sending a v2 with a commit message that describes what the
problem is and how your commit is fixing it?

Alistair

>
> Signed-off-by: Irina Ryapolova <irina.ryapolova@syntacore.com>
> ---
>  target/riscv/cpu_helper.c | 25 ++++++++++++++++---------
>  1 file changed, 16 insertions(+), 9 deletions(-)
>
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> index f88c503cf4..27289f2305 100644
> --- a/target/riscv/cpu_helper.c
> +++ b/target/riscv/cpu_helper.c
> @@ -863,17 +863,24 @@ static int get_physical_address(CPURISCVState *env, 
> hwaddr *physical,
>
>      CPUState *cs = env_cpu(env);
>      int va_bits = PGSHIFT + levels * ptidxbits + widened;
> -    target_ulong mask, masked_msbs;
>
> -    if (TARGET_LONG_BITS > (va_bits - 1)) {
> -        mask = (1L << (TARGET_LONG_BITS - (va_bits - 1))) - 1;
> -    } else {
> -        mask = 0;
> -    }
> -    masked_msbs = (addr >> (va_bits - 1)) & mask;
> +    if (first_stage == true) {
> +        target_ulong mask, masked_msbs;
> +
> +        if (TARGET_LONG_BITS > (va_bits - 1)) {
> +            mask = (1L << (TARGET_LONG_BITS - (va_bits - 1))) - 1;
> +        } else {
> +            mask = 0;
> +        }
> +        masked_msbs = (addr >> (va_bits - 1)) & mask;
>
> -    if (masked_msbs != 0 && masked_msbs != mask) {
> -        return TRANSLATE_FAIL;
> +        if (masked_msbs != 0 && masked_msbs != mask) {
> +            return TRANSLATE_FAIL;
> +        }
> +    } else {
> +        if (vm != VM_1_10_SV32 && addr >> va_bits != 0) {
> +            return TRANSLATE_FAIL;
> +        }
>      }
>
>      int ptshift = (levels - 1) * ptidxbits;
> --
> 2.25.1
>
>