Re: [PATCH v6 13/25] target/riscv: Introduce mmuidx_priv

[LIU Zhiwei]

On 2023/3/28 0:29, Richard Henderson wrote:
> On 3/26/23 19:07, LIU Zhiwei wrote:
> > > +static inline int mmuidx_priv(int mmu_idx)
> > > +{
> > > +    int ret = mmu_idx & 3;
> > > +    if (ret == MMUIdx_S_SUM) {
> > > +        ret = PRV_S;
> > > +    }
> > > +    return ret;
> > > +}
> > > +
> >
> > Can we remove the PRIV from the tb flags after we have this function?
>
> No, because this is the priv of the memory operation as modified by 
> e.g. MPRV, not the true cpu priv.

For this implementation, we explicitly use the tb flags for mmu index. I 
think it is the reason why we have to maintain the redundant privilege 
in tb flags.
It may be better to only store machine states into tb flags. Can we just 
pass everything that we need, for example, the priv and sum, and then 
implicitly
calculate the ctx->mem_idx in disas_init_fn?

I remember that you give the similar suggestion in the comment process

https://mail.gnu.org/archive/html/qemu-riscv/2023-03/msg00566.html

Best Regards,
Zhiwei

> r~