[PATCH 08/10] accel/tcg: push i386 specific hacks into handle_cpu_interrupt callback

[Alex Bennée]

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 include/hw/core/sysemu-cpu-ops.h | 11 +++++++++++
 target/i386/cpu-internal.h       |  1 +
 accel/tcg/cpu-exec-softmmu.c     | 16 ++++++++++++++++
 accel/tcg/cpu-exec.c             | 31 ++++++++++---------------------
 target/i386/cpu-sysemu.c         | 17 +++++++++++++++++
 target/i386/cpu.c                |  1 +
 6 files changed, 56 insertions(+), 21 deletions(-)

diff --git a/include/hw/core/sysemu-cpu-ops.h b/include/hw/core/sysemu-cpu-ops.h
index c9d30172c4..d53907b517 100644
--- a/include/hw/core/sysemu-cpu-ops.h
+++ b/include/hw/core/sysemu-cpu-ops.h
@@ -53,6 +53,15 @@ typedef struct SysemuCPUOps {
      * @cs: The CPUState
      */
     void (*handle_cpu_halt)(CPUState *cpu);
+    /**
+     * @handle_cpu_interrupt: handle init/reset interrupts
+     * @cs: The CPUState
+     * @irq_request: the interrupt request
+     *
+     * Most architectures share a common handler. Returns true if the
+     * handler did indeed handle and interrupt.
+     */
+    bool (*handle_cpu_interrupt)(CPUState *cpu,  int irq_request);
     /**
      * @write_elf32_note: Callback for writing a CPU-specific ELF note to a
      * 32-bit VM coredump.
@@ -94,4 +103,6 @@ typedef struct SysemuCPUOps {
 
 } SysemuCPUOps;
 
+bool common_cpu_handle_interrupt(CPUState *cpu,  int irq_request);
+
 #endif /* SYSEMU_CPU_OPS_H */
diff --git a/target/i386/cpu-internal.h b/target/i386/cpu-internal.h
index 75b302fb33..4fee4e125e 100644
--- a/target/i386/cpu-internal.h
+++ b/target/i386/cpu-internal.h
@@ -66,6 +66,7 @@ void x86_cpu_apic_create(X86CPU *cpu, Error **errp);
 void x86_cpu_apic_realize(X86CPU *cpu, Error **errp);
 void x86_cpu_machine_reset_cb(void *opaque);
 void x86_cpu_handle_halt(CPUState *cs);
+bool x86_cpu_handle_interrupt(CPUState *cpu,  int irq_request);
 #endif /* !CONFIG_USER_ONLY */
 
 #endif /* I386_CPU_INTERNAL_H */
diff --git a/accel/tcg/cpu-exec-softmmu.c b/accel/tcg/cpu-exec-softmmu.c
index 2318dd8c7d..89e6cb2e3a 100644
--- a/accel/tcg/cpu-exec-softmmu.c
+++ b/accel/tcg/cpu-exec-softmmu.c
@@ -18,7 +18,11 @@
  */
 
 #include "qemu/osdep.h"
+#include "qemu/main-loop.h"
+#include "exec/replay-core.h"
+#include "exec/cpu-irq.h"
 #include "hw/core/cpu.h"
+#include "hw/core/sysemu-cpu-ops.h"
 #include "sysemu/cpus.h"
 
 void cpu_reloading_memory_map(void)
@@ -48,3 +52,15 @@ void cpu_reloading_memory_map(void)
         rcu_read_lock();
     }
 }
+
+/* Called with BQL held */
+bool common_cpu_handle_interrupt(CPUState *cpu,  int interrupt_request)
+{
+    if (interrupt_request & CPU_INTERRUPT_RESET) {
+        replay_interrupt();
+        cpu_reset(cpu);
+        return true;
+    } else {
+        return false;
+    }
+}
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index daa6e24daf..8fa19b7222 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -797,28 +797,17 @@ static inline bool cpu_handle_interrupt(CPUState *cpu,
             cpu->exception_index = EXCP_HLT;
             return true;
         }
-#if defined(TARGET_I386)
-        else if (interrupt_request & CPU_INTERRUPT_INIT) {
-            X86CPU *x86_cpu = X86_CPU(cpu);
-            CPUArchState *env = &x86_cpu->env;
-            replay_interrupt();
-            cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0);
-            do_cpu_init(x86_cpu);
-            cpu->exception_index = EXCP_HALTED;
-            return true;
-        }
-#else
-        else if (interrupt_request & CPU_INTERRUPT_RESET) {
-            replay_interrupt();
-            cpu_reset(cpu);
+        else if (cpu->cc->sysemu_ops->handle_cpu_interrupt &&
+                 cpu->cc->sysemu_ops->handle_cpu_interrupt(cpu, 
interrupt_request)) {
+                return true;
+        } else if (common_cpu_handle_interrupt(cpu, interrupt_request)) {
             return true;
-        }
-#endif /* !TARGET_I386 */
-        /* The target hook has 3 exit conditions:
-           False when the interrupt isn't processed,
-           True when it is, and we should restart on a new TB,
-           and via longjmp via cpu_loop_exit.  */
-        else {
+        } else {
+            /*
+             * The target hook has 3 exit conditions: False when the
+             * interrupt isn't processed, True when it is, and we should
+             * restart on a new TB, and via longjmp via cpu_loop_exit.
+             */
             CPUClass *cc = CPU_GET_CLASS(cpu);
 
             if (cc->tcg_ops->cpu_exec_interrupt &&
diff --git a/target/i386/cpu-sysemu.c b/target/i386/cpu-sysemu.c
index e545bf7590..5638ed4aa4 100644
--- a/target/i386/cpu-sysemu.c
+++ b/target/i386/cpu-sysemu.c
@@ -31,6 +31,7 @@
 #include "hw/qdev-properties.h"
 
 #include "exec/address-spaces.h"
+#include "exec/replay-core.h"
 #include "hw/i386/apic_internal.h"
 
 #include "cpu-internal.h"
@@ -322,6 +323,22 @@ void x86_cpu_handle_halt(CPUState *cpu)
     }
 }
 
+/* Called with BQL held */
+bool x86_cpu_handle_interrupt(CPUState *cpu, int interrupt_request)
+{
+    if (interrupt_request & CPU_INTERRUPT_INIT) {
+        X86CPU *x86_cpu = X86_CPU(cpu);
+        CPUArchState *env = &x86_cpu->env;
+        replay_interrupt();
+        cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0);
+        do_cpu_init(x86_cpu);
+        cpu->exception_index = EXCP_HALTED;
+        return true;
+    } else {
+        return false;
+    }
+}
+
 GuestPanicInformation *x86_cpu_get_crash_info(CPUState *cs)
 {
     X86CPU *cpu = X86_CPU(cs);
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 67027d28b0..1b66583987 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -7242,6 +7242,7 @@ static const struct SysemuCPUOps i386_sysemu_ops = {
     .asidx_from_attrs = x86_asidx_from_attrs,
     .get_crash_info = x86_cpu_get_crash_info,
     .handle_cpu_halt = x86_cpu_handle_halt,
+    .handle_cpu_interrupt = x86_cpu_handle_interrupt,
     .write_elf32_note = x86_cpu_write_elf32_note,
     .write_elf64_note = x86_cpu_write_elf64_note,
     .write_elf32_qemunote = x86_cpu_write_elf32_qemunote,
-- 
2.39.2