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[PATCH for-8.1 v3 17/26] target/riscv: move riscv_cpu_validate_v() to va
From: |
Daniel Henrique Barboza |
Subject: |
[PATCH for-8.1 v3 17/26] target/riscv: move riscv_cpu_validate_v() to validate_misa_ext() |
Date: |
Sat, 18 Mar 2023 17:04:27 -0300 |
riscv_cpu_validate_v() consists of checking RVV related attributes, such
as vlen and elen, and setting env->vext_spec.
This can be done during riscv_cpu_validate_misa_ext() time, allowing us
to fail earlier if RVV constrains are not met.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
---
target/riscv/cpu.c | 20 +++++++++++---------
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index c7b05d7c4e..1116686cd1 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1027,6 +1027,9 @@ static void riscv_cpu_disable_priv_spec_isa_exts(RISCVCPU
*cpu)
static void riscv_cpu_validate_misa_ext(RISCVCPU *cpu, Error **errp)
{
+ CPURISCVState *env = &cpu->env;
+ Error *local_err = NULL;
+
if (cpu->cfg.ext_i && cpu->cfg.ext_e) {
error_setg(errp,
"I and E extensions are incompatible");
@@ -1060,6 +1063,14 @@ static void riscv_cpu_validate_misa_ext(RISCVCPU *cpu,
Error **errp)
error_setg(errp, "D extension requires F extension");
return;
}
+
+ if (cpu->cfg.ext_v) {
+ riscv_cpu_validate_v(env, &cpu->cfg, &local_err);
+ if (local_err != NULL) {
+ error_propagate(errp, local_err);
+ return;
+ }
+ }
}
static void riscv_cpu_validate_misa_mxl(RISCVCPU *cpu, Error **errp)
@@ -1097,7 +1108,6 @@ static void riscv_cpu_validate_misa_mxl(RISCVCPU *cpu,
Error **errp)
static void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, Error **errp)
{
CPURISCVState *env = &cpu->env;
- Error *local_err = NULL;
uint32_t ext = 0;
if (cpu->cfg.epmp && !cpu->cfg.pmp) {
@@ -1188,14 +1198,6 @@ static void riscv_cpu_validate_set_extensions(RISCVCPU
*cpu, Error **errp)
}
}
- if (cpu->cfg.ext_v) {
- riscv_cpu_validate_v(env, &cpu->cfg, &local_err);
- if (local_err != NULL) {
- error_propagate(errp, local_err);
- return;
- }
- }
-
if (cpu->cfg.ext_zk) {
cpu->cfg.ext_zkn = true;
cpu->cfg.ext_zkr = true;
--
2.39.2
- [PATCH for-8.1 v3 10/26] target/riscv/cpu.c: avoid set_misa() in validate_set_extensions(), (continued)
- [PATCH for-8.1 v3 10/26] target/riscv/cpu.c: avoid set_misa() in validate_set_extensions(), Daniel Henrique Barboza, 2023/03/18
- [PATCH for-8.1 v3 11/26] target/riscv/cpu.c: set cpu config in set_misa(), Daniel Henrique Barboza, 2023/03/18
- [PATCH for-8.1 v3 12/26] target/riscv/cpu.c: redesign register_cpu_props(), Daniel Henrique Barboza, 2023/03/18
- [PATCH for-8.1 v3 13/26] target/riscv: put env->misa_ext <-> cpu->cfg code into helpers, Daniel Henrique Barboza, 2023/03/18
- [PATCH for-8.1 v3 14/26] target/riscv: add RVG, Daniel Henrique Barboza, 2023/03/18
- [PATCH for-8.1 v3 15/26] target/riscv/cpu.c: split RVG code from validate_set_extensions(), Daniel Henrique Barboza, 2023/03/18
- [PATCH for-8.1 v3 16/26] target/riscv/cpu.c: add riscv_cpu_validate_misa_ext(), Daniel Henrique Barboza, 2023/03/18
- [PATCH for-8.1 v3 18/26] target/riscv: error out on priv failure for RVH, Daniel Henrique Barboza, 2023/03/18
- [PATCH for-8.1 v3 17/26] target/riscv: move riscv_cpu_validate_v() to validate_misa_ext(),
Daniel Henrique Barboza <=
- [PATCH for-8.1 v3 19/26] target/riscv: write env->misa_ext* in register_generic_cpu_props(), Daniel Henrique Barboza, 2023/03/18
- [PATCH for-8.1 v3 20/26] target/riscv: make validate_misa_ext() use a misa_ext val, Daniel Henrique Barboza, 2023/03/18
- [PATCH for-8.1 v3 21/26] target/riscv: split riscv_cpu_validate_set_extensions(), Daniel Henrique Barboza, 2023/03/18
- [PATCH for-8.1 v3 23/26] target/riscv: rework write_misa(), Daniel Henrique Barboza, 2023/03/18
- [PATCH for-8.1 v3 22/26] target/riscv: use misa_ext val in riscv_cpu_validate_extensions(), Daniel Henrique Barboza, 2023/03/18
- [PATCH for-8.1 v3 24/26] target/riscv: update cpu->cfg misa bits in commit_cpu_cfg(), Daniel Henrique Barboza, 2023/03/18
- [PATCH for-8.1 v3 25/26] target/riscv: allow write_misa() to enable RVG, Daniel Henrique Barboza, 2023/03/18
- [PATCH for-8.1 v3 26/26] target/riscv: allow write_misa() to enable RVV, Daniel Henrique Barboza, 2023/03/18