Re: [PATCH for-8.1 v2 19/26] target/riscv/cpu:c add misa_ext V-> D & F dependency

[liweiwei]

On 2023/3/15 00:49, Daniel Henrique Barboza wrote:
> We have a chained dependency in riscv_cpu_validate_set_extensions()
> related to RVV. If RVV is set, we enable other extensions such as
> Zve64d, Zve64f and Zve32f, and these depends on misa bits RVD and RVF.
> Thus, we're making RVV depend on RVD and RVF.
>
> Let's add this dependency in riscv_cpu_validate_misa_ext() to fail
> earlier.
>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> ---
>   target/riscv/cpu.c | 14 ++++++++++++++
>   1 file changed, 14 insertions(+)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 83b1b874ee..fa1954a850 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -1060,6 +1060,20 @@ static void riscv_cpu_validate_misa_ext(RISCVCPU *cpu, 
> Error **errp)
>           error_setg(errp, "D extension requires F extension");
>           return;
>       }
> +
> +    if (cpu->cfg.ext_v) {
> +        /*
> +         * V depends on Zve64d, which requires D. It also
> +         * depends on Zve64f, which depends on Zve32f,
> +         * which requires F.
> +         *
> +         * This means that V depends on both D and F.
> +         */
> +        if (!(cpu->cfg.ext_d && cpu->cfg.ext_f)) {
> +            error_setg(errp, "V extension requires D and F extensions");
> +            return;
> +        }
> +    }
>   }

It seems not necessary to add this check here, since "zve64d requires D" 
will be checked later.

By the way,  "D requires  F" is checked before, so  check on F is 
redundant here.

Regards,

Weiwei Li

>   
>   static void riscv_cpu_validate_misa_mxl(RISCVCPU *cpu, Error **errp)