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[PULL 69/73] hw/pci: Add pcie_count_ds_port() and pcie_find_port_first()
From: |
Michael S. Tsirkin |
Subject: |
[PULL 69/73] hw/pci: Add pcie_count_ds_port() and pcie_find_port_first() helpers |
Date: |
Tue, 7 Mar 2023 20:14:17 -0500 |
From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
These two helpers enable host bridges to operate differently depending on
the number of downstream ports, in particular if there is only a single
port.
Useful for CXL where HDM address decoders are allowed to be implicit in
the host bridge if there is only a single root port.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20230227153128.8164-2-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
include/hw/pci/pcie_port.h | 2 ++
hw/pci/pcie_port.c | 38 ++++++++++++++++++++++++++++++++++++++
2 files changed, 40 insertions(+)
diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h
index 6c40e3733f..90e6cf45b8 100644
--- a/include/hw/pci/pcie_port.h
+++ b/include/hw/pci/pcie_port.h
@@ -41,6 +41,8 @@ struct PCIEPort {
void pcie_port_init_reg(PCIDevice *d);
PCIDevice *pcie_find_port_by_pn(PCIBus *bus, uint8_t pn);
+PCIDevice *pcie_find_port_first(PCIBus *bus);
+int pcie_count_ds_ports(PCIBus *bus);
#define TYPE_PCIE_SLOT "pcie-slot"
OBJECT_DECLARE_SIMPLE_TYPE(PCIESlot, PCIE_SLOT)
diff --git a/hw/pci/pcie_port.c b/hw/pci/pcie_port.c
index 000633fec1..20ff2b39e8 100644
--- a/hw/pci/pcie_port.c
+++ b/hw/pci/pcie_port.c
@@ -161,6 +161,44 @@ PCIDevice *pcie_find_port_by_pn(PCIBus *bus, uint8_t pn)
return NULL;
}
+/* Find first port in devfn number order */
+PCIDevice *pcie_find_port_first(PCIBus *bus)
+{
+ int devfn;
+
+ for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
+ PCIDevice *d = bus->devices[devfn];
+
+ if (!d || !pci_is_express(d) || !d->exp.exp_cap) {
+ continue;
+ }
+
+ if (object_dynamic_cast(OBJECT(d), TYPE_PCIE_PORT)) {
+ return d;
+ }
+ }
+
+ return NULL;
+}
+
+int pcie_count_ds_ports(PCIBus *bus)
+{
+ int dsp_count = 0;
+ int devfn;
+
+ for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
+ PCIDevice *d = bus->devices[devfn];
+
+ if (!d || !pci_is_express(d) || !d->exp.exp_cap) {
+ continue;
+ }
+ if (object_dynamic_cast(OBJECT(d), TYPE_PCIE_PORT)) {
+ dsp_count++;
+ }
+ }
+ return dsp_count;
+}
+
static bool pcie_slot_is_hotpluggbale_bus(HotplugHandler *plug_handler,
BusState *bus)
{
--
MST
- [PULL 58/73] acpi: pci: move out ACPI PCI hotplug generator from generic slot generator build_append_pci_bus_devices(), (continued)
- [PULL 58/73] acpi: pci: move out ACPI PCI hotplug generator from generic slot generator build_append_pci_bus_devices(), Michael S. Tsirkin, 2023/03/07
- [PULL 60/73] pcihp: add ACPI PCI hotplug specific is_hotpluggable_bus() callback, Michael S. Tsirkin, 2023/03/07
- [PULL 61/73] hw/pci/aer: Implement PCI_ERR_UNCOR_MASK register, Michael S. Tsirkin, 2023/03/07
- [PULL 62/73] hw/pci/aer: Add missing routing for AER errors, Michael S. Tsirkin, 2023/03/07
- [PULL 63/73] hw/pci-bridge/cxl_root_port: Wire up AER, Michael S. Tsirkin, 2023/03/07
- [PULL 64/73] hw/pci-bridge/cxl_root_port: Wire up MSI, Michael S. Tsirkin, 2023/03/07
- [PULL 65/73] hw/mem/cxl-type3: Add AER extended capability, Michael S. Tsirkin, 2023/03/07
- [PULL 66/73] hw/cxl: Fix endian issues in CXL RAS capability defaults / masks, Michael S. Tsirkin, 2023/03/07
- [PULL 67/73] hw/pci/aer: Make PCIE AER error injection facility available for other emulation to use., Michael S. Tsirkin, 2023/03/07
- [PULL 68/73] hw/mem/cxl_type3: Add CXL RAS Error Injection Support., Michael S. Tsirkin, 2023/03/07
- [PULL 69/73] hw/pci: Add pcie_count_ds_port() and pcie_find_port_first() helpers,
Michael S. Tsirkin <=
- [PULL 71/73] hw/virtio/vhost-user: avoid using unitialized errp, Michael S. Tsirkin, 2023/03/07
- [PULL 70/73] hw/pxb-cxl: Support passthrough HDM Decoders unless overridden, Michael S. Tsirkin, 2023/03/07
- [PULL 72/73] virtio: fix reachable assertion due to stale value of cached region size, Michael S. Tsirkin, 2023/03/07
- [PULL 73/73] virtio: refresh vring region cache after updating a virtqueue size, Michael S. Tsirkin, 2023/03/07
- Re: [PULL 00/73] virtio,pc,pci: features, fixes, Michael S. Tsirkin, 2023/03/09
- Re: [PULL 00/73] virtio,pc,pci: features, fixes, Peter Maydell, 2023/03/10
- Re: [PULL 00/73] virtio,pc,pci: features, fixes, Philippe Mathieu-Daudé, 2023/03/10
- Re: [PULL 00/73] virtio,pc,pci: features, fixes, Michael S. Tsirkin, 2023/03/11
- Re: [PULL 00/73] virtio,pc,pci: features, fixes, Philippe Mathieu-Daudé, 2023/03/13