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Re: [RFC PATCH] target/i386: Set family/model/stepping of the "max" CPU
From: |
Daniel P . Berrangé |
Subject: |
Re: [RFC PATCH] target/i386: Set family/model/stepping of the "max" CPU according to LM bit |
Date: |
Mon, 6 Mar 2023 15:56:43 +0000 |
User-agent: |
Mutt/2.2.9 (2022-11-12) |
On Mon, Mar 06, 2023 at 04:43:11PM +0100, Thomas Huth wrote:
> We want to get rid of the "#ifdef TARGET_X86_64" compile-time switch
> in the long run, so we can drop the separate compilation of the
> "qemu-system-i386" binary one day - but we then still need a way to
> run a guest with max. CPU settings in 32-bit mode. So the "max" CPU
> should determine its family/model/stepping settings according to the
> "large mode" (LM) CPU feature bit during runtime, so that it is
> possible to run "qemu-system-x86_64 -cpu max,lm=off" and still get
> a sane family/model/stepping setting for the guest CPU.
>
> To be able to check the LM bit, we have to move the code that sets
> up these properties to a "realize" function, since the LM setting is
> not available yet when the "instance_init" function is being called.
Ah, yes, makes sense.
>
> Signed-off-by: Thomas Huth <thuth@redhat.com>
> ---
> target/i386/cpu.c | 31 ++++++++++++++++++++++---------
> 1 file changed, 22 insertions(+), 9 deletions(-)
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
>
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index cab1e2a957..fe3b78fc95 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -44,6 +44,8 @@
> #include "disas/capstone.h"
> #include "cpu-internal.h"
>
> +static void x86_cpu_realizefn(DeviceState *dev, Error **errp);
> +
> /* Helpers for building CPUID[2] descriptors: */
>
> struct CPUID2CacheDescriptorInfo {
> @@ -4315,6 +4317,25 @@ static Property max_x86_cpu_properties[] = {
> DEFINE_PROP_END_OF_LIST()
> };
>
> +static void max_x86_cpu_realize(DeviceState *dev, Error **errp)
> +{
> + Object *obj = OBJECT(dev);
> +
> + if (!object_property_get_int(obj, "family", &error_abort)) {
> + if (X86_CPU(obj)->env.features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) {
> + object_property_set_int(obj, "family", 15, &error_abort);
> + object_property_set_int(obj, "model", 107, &error_abort);
> + object_property_set_int(obj, "stepping", 1, &error_abort);
> + } else {
> + object_property_set_int(obj, "family", 6, &error_abort);
> + object_property_set_int(obj, "model", 6, &error_abort);
> + object_property_set_int(obj, "stepping", 3, &error_abort);
> + }
> + }
> +
> + x86_cpu_realizefn(dev, errp);
> +}
> +
> static void max_x86_cpu_class_init(ObjectClass *oc, void *data)
> {
> DeviceClass *dc = DEVICE_CLASS(oc);
> @@ -4326,6 +4347,7 @@ static void max_x86_cpu_class_init(ObjectClass *oc,
> void *data)
> "Enables all features supported by the accelerator in the current
> host";
>
> device_class_set_props(dc, max_x86_cpu_properties);
> + dc->realize = max_x86_cpu_realize;
> }
>
> static void max_x86_cpu_initfn(Object *obj)
> @@ -4344,15 +4366,6 @@ static void max_x86_cpu_initfn(Object *obj)
> */
> object_property_set_str(OBJECT(cpu), "vendor", CPUID_VENDOR_AMD,
> &error_abort);
> -#ifdef TARGET_X86_64
> - object_property_set_int(OBJECT(cpu), "family", 15, &error_abort);
> - object_property_set_int(OBJECT(cpu), "model", 107, &error_abort);
> - object_property_set_int(OBJECT(cpu), "stepping", 1, &error_abort);
> -#else
> - object_property_set_int(OBJECT(cpu), "family", 6, &error_abort);
> - object_property_set_int(OBJECT(cpu), "model", 6, &error_abort);
> - object_property_set_int(OBJECT(cpu), "stepping", 3, &error_abort);
> -#endif
> object_property_set_str(OBJECT(cpu), "model-id",
> "QEMU TCG CPU version " QEMU_HW_VERSION,
> &error_abort);
> --
> 2.31.1
>
With regards,
Daniel
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