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[PULL 048/126] hw/i386/ich9: Remove redundant GSI_NUM_PINS
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 048/126] hw/i386/ich9: Remove redundant GSI_NUM_PINS |
Date: |
Mon, 27 Feb 2023 15:00:55 +0100 |
From: Bernhard Beschow <shentey@gmail.com>
Most code uses IOAPIC_NUM_PINS. The only place where GSI_NUM_PINS defines
the size of an array is ICH9LPCState::gsi which needs to match
IOAPIC_NUM_PINS. Remove GSI_NUM_PINS for consistency.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230213173033.98762-10-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/i386/pc.c | 6 +++---
hw/i386/pc_q35.c | 3 ++-
hw/isa/lpc_ich9.c | 2 +-
include/hw/i386/ich9.h | 2 +-
include/hw/i386/x86.h | 1 -
5 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index a7a2ededf9..d257545018 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -28,7 +28,7 @@
#include "hw/i386/pc.h"
#include "hw/char/serial.h"
#include "hw/char/parallel.h"
-#include "hw/i386/apic.h"
+#include "hw/i386/ioapic.h"
#include "hw/i386/topology.h"
#include "hw/i386/fw_cfg.h"
#include "hw/i386/vmport.h"
@@ -405,7 +405,7 @@ GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled)
if (kvm_ioapic_in_kernel()) {
kvm_pc_setup_irq_routing(pci_enabled);
}
- *irqs = qemu_allocate_irqs(gsi_handler, s, GSI_NUM_PINS);
+ *irqs = qemu_allocate_irqs(gsi_handler, s, IOAPIC_NUM_PINS);
return s;
}
@@ -1296,7 +1296,7 @@ void pc_basic_device_init(struct PCMachineState *pcms,
sysbus_realize_and_unref(SYS_BUS_DEVICE(hpet), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(hpet), 0, HPET_BASE);
- for (i = 0; i < GSI_NUM_PINS; i++) {
+ for (i = 0; i < IOAPIC_NUM_PINS; i++) {
sysbus_connect_irq(SYS_BUS_DEVICE(hpet), i, gsi[i]);
}
pit_isa_irq = -1;
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 4508e8ac10..d35316878d 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -43,6 +43,7 @@
#include "hw/i386/ich9.h"
#include "hw/i386/amd_iommu.h"
#include "hw/i386/intel_iommu.h"
+#include "hw/i386/ioapic.h"
#include "hw/display/ramfb.h"
#include "hw/firmware/smbios.h"
#include "hw/ide/pci.h"
@@ -267,7 +268,7 @@ static void pc_q35_init(MachineState *machine)
gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled);
lpc_dev = DEVICE(lpc);
- for (i = 0; i < GSI_NUM_PINS; i++) {
+ for (i = 0; i < IOAPIC_NUM_PINS; i++) {
qdev_connect_gpio_out_named(lpc_dev, ICH9_GPIO_GSI, i, x86ms->gsi[i]);
}
isa_bus = ISA_BUS(qdev_get_child_bus(lpc_dev, "isa.0"));
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index 2a4baac129..e3385ca7be 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -717,7 +717,7 @@ static void ich9_lpc_realize(PCIDevice *d, Error **errp)
ICH9_RST_CNT_IOPORT, &lpc->rst_cnt_mem,
1);
- qdev_init_gpio_out_named(dev, lpc->gsi, ICH9_GPIO_GSI, GSI_NUM_PINS);
+ qdev_init_gpio_out_named(dev, lpc->gsi, ICH9_GPIO_GSI, IOAPIC_NUM_PINS);
isa_bus_irqs(isa_bus, lpc->gsi);
diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h
index 433c8942c9..d29090a9b7 100644
--- a/include/hw/i386/ich9.h
+++ b/include/hw/i386/ich9.h
@@ -63,7 +63,7 @@ struct ICH9LPCState {
MemoryRegion rcrb_mem; /* root complex register block */
Notifier machine_ready;
- qemu_irq gsi[GSI_NUM_PINS];
+ qemu_irq gsi[IOAPIC_NUM_PINS];
};
#define ICH9_MASK(bit, ms_bit, ls_bit) \
diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h
index 5d3047a1d1..a09388b657 100644
--- a/include/hw/i386/x86.h
+++ b/include/hw/i386/x86.h
@@ -131,7 +131,6 @@ bool x86_machine_is_acpi_enabled(const X86MachineState
*x86ms);
/* Global System Interrupts */
-#define GSI_NUM_PINS IOAPIC_NUM_PINS
#define ACPI_BUILD_PCI_IRQS ((1<<5) | (1<<9) | (1<<10) | (1<<11))
typedef struct GSIState {
--
2.38.1
- [PULL 039/126] hw/i386/x86: Reduce init_topo_info() scope, (continued)
- [PULL 039/126] hw/i386/x86: Reduce init_topo_info() scope, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 040/126] hw/i386/ich9: Rename Q35_MASK to ICH9_MASK, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 041/126] hw/isa/lpc_ich9: Unexport PIRQ functions, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 042/126] hw/isa/lpc_ich9: Eliminate ICH9LPCState::isa_bus, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 043/126] hw/i2c/smbus_ich9: Move ich9_smb_set_irq() in front of ich9_smbus_realize(), Philippe Mathieu-Daudé, 2023/02/27
- [PULL 044/126] hw/i2c/smbus_ich9: Inline ich9_smb_init() and remove it, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 045/126] hw/i386/pc_q35: Allow for setting properties before realizing TYPE_ICH9_LPC_DEVICE, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 047/126] hw/isa/lpc_ich9: Remove redundant ich9_lpc_reset() invocation, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 046/126] hw/isa/lpc_ich9: Connect PM stuff to LPC internally, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 049/126] hw: Move ioapic*.h to intc/, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 048/126] hw/i386/ich9: Remove redundant GSI_NUM_PINS,
Philippe Mathieu-Daudé <=
- [PULL 050/126] hw/i386/ich9: Clean up includes, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 052/126] hw/pci: Fix a typo, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 051/126] hw: Move ich9.h to southbridge/, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 053/126] hw/intc/i8259: Document i8259_init(), Philippe Mathieu-Daudé, 2023/02/27
- [PULL 054/126] hw/isa/i82378: Rename output IRQ as 'cpu_intr', Philippe Mathieu-Daudé, 2023/02/27
- [PULL 055/126] hw/isa/i82378: Remove intermediate IRQ forwarder, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 056/126] hw/isa/vt82c686: Remove intermediate IRQ forwarder, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 057/126] hw/sparc64/sun4u: Keep reference to ISA input IRQs in EbusState, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 058/126] hw/isa: Remove empty ISADeviceClass structure, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 059/126] hw/isa: Reorder to separate ISABus* vs ISADevice* functions, Philippe Mathieu-Daudé, 2023/02/27