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[PULL 038/126] hw/cpu: Extend CPUState::cluster_index documentation
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 038/126] hw/cpu: Extend CPUState::cluster_index documentation |
Date: |
Mon, 27 Feb 2023 15:00:45 +0100 |
Copy part of the description of commit f7b78602fd ("accel/tcg:
Add cluster number to TCG TB hash") in tcg_cpu_init_cflags(),
improving a bit CPUState::cluster_index documentation.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20230216142338.82982-2-philmd@linaro.org>
---
accel/tcg/tcg-accel-ops.c | 13 ++++++++++++-
include/hw/core/cpu.h | 2 ++
2 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c
index d9228fd403..aeb1cbaf65 100644
--- a/accel/tcg/tcg-accel-ops.c
+++ b/accel/tcg/tcg-accel-ops.c
@@ -44,7 +44,18 @@
void tcg_cpu_init_cflags(CPUState *cpu, bool parallel)
{
- uint32_t cflags = cpu->cluster_index << CF_CLUSTER_SHIFT;
+ uint32_t cflags;
+
+ /*
+ * Include the cluster number in the hash we use to look up TBs.
+ * This is important because a TB that is valid for one cluster at
+ * a given physical address and set of CPU flags is not necessarily
+ * valid for another:
+ * the two clusters may have different views of physical memory, or
+ * may have different CPU features (eg FPU present or absent).
+ */
+ cflags = cpu->cluster_index << CF_CLUSTER_SHIFT;
+
cflags |= parallel ? CF_PARALLEL : 0;
cflags |= icount_enabled() ? CF_USE_ICOUNT : 0;
cpu->tcg_cflags = cflags;
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index a5aa44d12c..7fd6657039 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -272,6 +272,8 @@ struct qemu_work_item;
* to a cluster this will be UNASSIGNED_CLUSTER_INDEX; otherwise it will
* be the same as the cluster-id property of the CPU object's
TYPE_CPU_CLUSTER
* QOM parent.
+ * Under TCG this value is propagated to @tcg_cflags.
+ * See TranslationBlock::TCG CF_CLUSTER_MASK.
* @tcg_cflags: Pre-computed cflags for this cpu.
* @nr_cores: Number of cores within this CPU package.
* @nr_threads: Number of threads within this CPU.
--
2.38.1
- [PULL 030/126] sysemu/kvm: Remove CONFIG_USER_ONLY guard, (continued)
- [PULL 030/126] sysemu/kvm: Remove CONFIG_USER_ONLY guard, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 029/126] accel/kvm: Silent -Wmissing-field-initializers warning, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 028/126] accel/xen: Remove dead code, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 031/126] replay: Extract core API to 'exec/replay-core.h', Philippe Mathieu-Daudé, 2023/02/27
- [PULL 032/126] tests/unit: Restrict machine-smp.c test to system emulation, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 033/126] softmmu: Silent -Wmissing-field-initializers warning, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 035/126] qemu/typedefs: Sort in case-insensitive alphabetical order (again), Philippe Mathieu-Daudé, 2023/02/27
- [PULL 034/126] softmmu: Extract watchpoint API from physmem.c, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 036/126] hw/nubus/nubus-device: Fix memory leak in nubus_device_realize, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 037/126] hw/qdev: Constify DeviceState* argument of qdev_get_parent_bus(), Philippe Mathieu-Daudé, 2023/02/27
- [PULL 038/126] hw/cpu: Extend CPUState::cluster_index documentation,
Philippe Mathieu-Daudé <=
- [PULL 039/126] hw/i386/x86: Reduce init_topo_info() scope, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 040/126] hw/i386/ich9: Rename Q35_MASK to ICH9_MASK, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 041/126] hw/isa/lpc_ich9: Unexport PIRQ functions, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 042/126] hw/isa/lpc_ich9: Eliminate ICH9LPCState::isa_bus, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 043/126] hw/i2c/smbus_ich9: Move ich9_smb_set_irq() in front of ich9_smbus_realize(), Philippe Mathieu-Daudé, 2023/02/27
- [PULL 044/126] hw/i2c/smbus_ich9: Inline ich9_smb_init() and remove it, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 045/126] hw/i386/pc_q35: Allow for setting properties before realizing TYPE_ICH9_LPC_DEVICE, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 047/126] hw/isa/lpc_ich9: Remove redundant ich9_lpc_reset() invocation, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 046/126] hw/isa/lpc_ich9: Connect PM stuff to LPC internally, Philippe Mathieu-Daudé, 2023/02/27
- [PULL 049/126] hw: Move ioapic*.h to intc/, Philippe Mathieu-Daudé, 2023/02/27