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[PATCH v4 0/4] target/i386: Add new CPU model SapphireRapids and new fas
From: |
Paolo Bonzini |
Subject: |
[PATCH v4 0/4] target/i386: Add new CPU model SapphireRapids and new fast string op leaves |
Date: |
Mon, 27 Feb 2023 11:13:27 +0100 |
Sapphire Rapids enablement patches got stuck on the doubts regarding
properties for AMX support. However, for now there is no need to have
anything but hardcoded values, because all Intel processors with AMX
currently support exactly the same palettes and TMUL limits. Intel has
also promised that palette formats will remain backwards compatible so
the only worry is for the TMUL leaf, CPUID[1Eh].
However, providing modifiable properties for AMX is premature. Rather,
the first step should be to _validate_ host CPUID values against the
ones supported by QEMU. So for now apply the simpler patch that only
adds the new model.
In addition, add the FZRM, FSRS, FSRC bits: first, they are now supported
by Linux (albeit only in the upcoming 6.3 release); second, they are just
markers that do not require any support in the hypervisors. While at
it, this series also adds these new markers as well as FSRM to TCG's
"-cpu max" model.
Supersedes: <20230106083826.5384-1-lei4.wang@intel.com>
Paolo Bonzini (3):
target/i386: add FSRM to TCG
target/i386: add FZRM, FSRS, FSRC
target/i386: KVM: allow fast string operations if host supports them
Wang, Lei (1):
target/i386: Add new CPU model SapphireRapids
target/i386/cpu.c | 142 ++++++++++++++++++++++++++++++++++++++++--
target/i386/cpu.h | 11 ++++
target/i386/kvm/kvm.c | 17 ++++-
3 files changed, 163 insertions(+), 7 deletions(-)
--
2.39.1