Re: [PATCH 1/6] target/riscv: Fix the relationship between menvcfg.PBMTE/STCE and Svpbmt/Sstc extensions

[Daniel Henrique Barboza]

On 2/24/23 01:08, Weiwei Li wrote:
> menvcfg.PBMTE/STCE are read-only zero if Svpbmt/Sstc are not implemented.
>
> Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
> Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
> ---

Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>

>   target/riscv/csr.c | 8 ++++++--
>   1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/target/riscv/csr.c b/target/riscv/csr.c
> index fa17d7770c..feae23cab0 100644
> --- a/target/riscv/csr.c
> +++ b/target/riscv/csr.c
> @@ -1885,10 +1885,12 @@ static RISCVException read_menvcfg(CPURISCVState *env, 
> int csrno,
>   static RISCVException write_menvcfg(CPURISCVState *env, int csrno,
>                                     target_ulong val)
>   {
> +    RISCVCPUConfig *cfg = &env_archcpu(env)->cfg;
>       uint64_t mask = MENVCFG_FIOM | MENVCFG_CBIE | MENVCFG_CBCFE | 
> MENVCFG_CBZE;
>   
>       if (riscv_cpu_mxl(env) == MXL_RV64) {
> -        mask |= MENVCFG_PBMTE | MENVCFG_STCE;
> +        mask |= (cfg->ext_svpbmt ? MENVCFG_PBMTE : 0) |
> +                (cfg->ext_sstc ? MENVCFG_STCE : 0);
>       }
>       env->menvcfg = (env->menvcfg & ~mask) | (val & mask);
>   
> @@ -1905,7 +1907,9 @@ static RISCVException read_menvcfgh(CPURISCVState *env, int csrno,
>   static RISCVException write_menvcfgh(CPURISCVState *env, int csrno,
>                                     target_ulong val)
>   {
> -    uint64_t mask = MENVCFG_PBMTE | MENVCFG_STCE;
> +    RISCVCPUConfig *cfg = &env_archcpu(env)->cfg;
> +    uint64_t mask = (cfg->ext_svpbmt ? MENVCFG_PBMTE : 0) |
> +                    (cfg->ext_sstc ? MENVCFG_STCE : 0);
>       uint64_t valh = (uint64_t)val << 32;
>   
>       env->menvcfg = (env->menvcfg & ~mask) | (valh & mask);