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From: | Richard Henderson |
Subject: | Re: [PATCH qemu 1/1] target/i386: Fix gen_shift_rm_T1, wrong eflags calculation |
Date: | Thu, 23 Feb 2023 12:23:47 -1000 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.1 |
On 2/23/23 11:13, ~vilenka wrote:
From: Vilen Kamalov <vilen.kamalov@gmail.com> gen_shift_rm_T1 in the uses wrong tmp0 register, eflags calculation uses tmp4 at target/i386/tcg/translate.c, line 5488 `tcg_gen_mov_tl(cpu_cc_src, s->tmp4);` QEMU fails to pass int3 in next sample, vs real cpu ------------- push rcx mov dword ptr [rsp], 010000000h mov rcx, 01eh sar dword ptr [rsp], cl jnc pass1 int 3 pass1: mov dword ptr [rsp], 0ffffffffh mov rcx, 01eh sar dword ptr [rsp], cl jc pass2 int 3 pass2: pop rcx -------------
Rewritten as a standalone test: int main() { unsigned m = 0x10000000; unsigned char c = 0x1e; m = 0x10000000u; asm volatile("sarl %1, %0; jnc 1f; ud2; 1:" : "+m"(m) : "c"(0x1e)); m = 0xffffffffu; asm volatile("sarl %1, %0; jc 1f; ud2; 1:" : "+m"(m) : "c"(0x1e)); return 0; } This test passes for me, for both qemu-i386 and qemu-x86_64. So, I don't see your reported failure at all. r~
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