Re: [PATCH 2/9] target/arm: Constify ID_PFR1 on user emulation

[Richard Henderson]

On 2/6/23 02:17, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   target/arm/helper.c | 12 ++++++++++--
>   1 file changed, 10 insertions(+), 2 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~

> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index 5dbeade787..b58800a1a5 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -7021,6 +7021,7 @@ static void define_pmu_regs(ARMCPU *cpu)
>       }
>   }
>   
> +#ifndef CONFIG_USER_ONLY
>   /*
>    * We don't know until after realize whether there's a GICv3
>    * attached, and that is what registers the gicv3 sysregs.
> @@ -7038,7 +7039,6 @@ static uint64_t id_pfr1_read(CPUARMState *env, const 
> ARMCPRegInfo *ri)
>       return pfr1;
>   }
>   
> -#ifndef CONFIG_USER_ONLY
>   static uint64_t id_aa64pfr0_read(CPUARMState *env, const ARMCPRegInfo *ri)
>   {
>       ARMCPU *cpu = env_archcpu(env);
> @@ -7998,8 +7998,16 @@ void register_cp_regs_for_features(ARMCPU *cpu)
>                 .opc0 = 3, .opc1 = 0, .crn = 0, .crm = 1, .opc2 = 1,
>                 .access = PL1_R, .type = ARM_CP_NO_RAW,
>                 .accessfn = access_aa32_tid3,
> +#ifdef CONFIG_USER_ONLY
> +              .type = ARM_CP_CONST,
> +              .resetvalue = cpu->isar.id_pfr1,
> +#else
> +              .type = ARM_CP_NO_RAW,
> +              .accessfn = access_aa32_tid3,
>                 .readfn = id_pfr1_read,
> -              .writefn = arm_cp_write_ignore },
> +              .writefn = arm_cp_write_ignore
> +#endif
> +            },
>               { .name = "ID_DFR0", .state = ARM_CP_STATE_BOTH,
>                 .opc0 = 3, .opc1 = 0, .crn = 0, .crm = 1, .opc2 = 2,
>                 .access = PL1_R, .type = ARM_CP_CONST,