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[PULL 01/40] accel/tcg: Test CPUJumpCache in tb_jmp_cache_clear_page
From: |
Richard Henderson |
Subject: |
[PULL 01/40] accel/tcg: Test CPUJumpCache in tb_jmp_cache_clear_page |
Date: |
Sat, 4 Feb 2023 06:32:31 -1000 |
From: Eric Auger <eric.auger@redhat.com>
After commit 4e4fa6c12d ("accel/tcg: Complete cpu initialization
before registration"), it looks the CPUJumpCache pointer can be NULL.
This causes a SIGSEV when running debug-wp-migration kvm unit test.
At the first place it should be clarified why this TCG code is called
with KVM acceleration. This may hide another bug.
Fixes: 4e4fa6c12d ("accel/tcg: Complete cpu initialization before registration")
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Message-Id: <20230203171510.2867451-1-eric.auger@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/cputlb.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 4e040a1cb9..04e270742e 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -100,9 +100,14 @@ static void tlb_window_reset(CPUTLBDesc *desc, int64_t ns,
static void tb_jmp_cache_clear_page(CPUState *cpu, target_ulong page_addr)
{
- int i, i0 = tb_jmp_cache_hash_page(page_addr);
CPUJumpCache *jc = cpu->tb_jmp_cache;
+ int i, i0;
+ if (unlikely(!jc)) {
+ return;
+ }
+
+ i0 = tb_jmp_cache_hash_page(page_addr);
for (i = 0; i < TB_JMP_PAGE_SIZE; i++) {
qatomic_set(&jc->array[i0 + i].tb, NULL);
}
--
2.34.1
- [PULL 03/40] tcg: Define TCG_TYPE_I128 and related helper macros, (continued)
- [PULL 03/40] tcg: Define TCG_TYPE_I128 and related helper macros, Richard Henderson, 2023/02/04
- [PULL 16/40] tcg: Add basic data movement for TCGv_i128, Richard Henderson, 2023/02/04
- [PULL 08/40] tcg: Introduce tcg_target_call_oarg_reg, Richard Henderson, 2023/02/04
- [PULL 13/40] tcg/tci: Add TCG_TARGET_CALL_{RET,ARG}_I128, Richard Henderson, 2023/02/04
- [PULL 06/40] tcg: Introduce tcg_out_addi_ptr, Richard Henderson, 2023/02/04
- [PULL 12/40] tcg/tci: Fix big-endian return register ordering, Richard Henderson, 2023/02/04
- [PULL 14/40] tcg: Add TCG_TARGET_CALL_{RET,ARG}_I128, Richard Henderson, 2023/02/04
- [PULL 05/40] tcg: Allocate objects contiguously in temp_allocate_frame, Richard Henderson, 2023/02/04
- [PULL 07/40] tcg: Add TCG_CALL_{RET,ARG}_BY_REF, Richard Henderson, 2023/02/04
- [PULL 02/40] tcg: Init temp_subindex in liveness_pass_2, Richard Henderson, 2023/02/04
- [PULL 01/40] accel/tcg: Test CPUJumpCache in tb_jmp_cache_clear_page,
Richard Henderson <=
- [PULL 11/40] tcg/i386: Add TCG_TARGET_CALL_{RET,ARG}_I128, Richard Henderson, 2023/02/04
- [PULL 04/40] tcg: Handle dh_typecode_i128 with TCG_CALL_{RET, ARG}_NORMAL, Richard Henderson, 2023/02/04
- [PULL 15/40] tcg: Add temp allocation for TCGv_i128, Richard Henderson, 2023/02/04
- [PULL 17/40] tcg: Add guest load/store primitives for TCGv_i128, Richard Henderson, 2023/02/04
- [PULL 18/40] tcg: Add tcg_gen_{non}atomic_cmpxchg_i128, Richard Henderson, 2023/02/04
- [PULL 20/40] target/arm: Use tcg_gen_atomic_cmpxchg_i128 for STXP, Richard Henderson, 2023/02/04
- [PULL 19/40] tcg: Split out tcg_gen_nonatomic_cmpxchg_i{32,64}, Richard Henderson, 2023/02/04
- [PULL 21/40] target/arm: Use tcg_gen_atomic_cmpxchg_i128 for CASP, Richard Henderson, 2023/02/04
- [PULL 22/40] target/ppc: Use tcg_gen_atomic_cmpxchg_i128 for STQCX, Richard Henderson, 2023/02/04
- [PULL 23/40] tests/tcg/s390x: Add div.c, Richard Henderson, 2023/02/04