Re: [PATCH] target/arm: Add raw_writes ops for register whose write induce TLB maintenance

[Eric Auger]

Hi Peter,

On 2/3/23 19:04, Peter Maydell wrote:
> On Fri, 3 Feb 2023 at 17:17, Eric Auger <eric.auger@redhat.com> wrote:
>> Many registers whose 'cooked' writefns induce TLB maintenance do
>> not have raw_writefn ops defined. If only the writefn ops is set
>> (ie. no raw_writefn is provided), it is assumed the cooked also
>> work as the raw one. For those registers it is not obvious the
>> tlb_flush works on KVM mode so better/safer setting the raw write.
>>
>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>> Suggested-by: Peter Maydell <peter.maydell@linaro.org>
>>
>> ---
>>
>> I'am not familiar with those callbacks. I have tested in kvm accelerated
>> mode including migration but I fail to test with TCG. It SIGSEVs for
>> me even without my additions. I am not sure whether the .raw_writefn
>> must be set only for registers only doing some TLB maintenance or
>> shall be set safely on other registers doing TLB maintenance + other
>> state settings.
>> ---
>> @@ -718,16 +718,20 @@ static const ARMCPRegInfo not_v7_cp_reginfo[] = {
>>       * the unified TLB ops but also the dside/iside/inner-shareable 
>> variants.
>>       */
>>      { .name = "TLBIALL", .cp = 15, .crn = 8, .crm = CP_ANY,
>> -      .opc1 = CP_ANY, .opc2 = 0, .access = PL1_W, .writefn = tlbiall_write,
>> +      .opc1 = CP_ANY, .opc2 = 0, .access = PL1_W,
>> +      .writefn = tlbiall_write, .raw_writefn = raw_write,
>>        .type = ARM_CP_NO_RAW },
> Anything with type ARM_CP_NO_RAW shouldn't need a .raw_writefn, because
> that type indication says that it's a bug if we ever call
> read_raw_cp_reg() or write_raw_cp_reg() on it. (Specifically,
> for KVM, we should never end up trying to do a raw read/write
> for a state sync because write_list_to_cpustate() and
> write_cpustate_to_list() skip NO_RAW cpregs.)

OK thanks for the info. I will respin accordingly.

Eric
>
> thanks
> -- PMM
>