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[PULL 25/37] target/riscv: Use TARGET_FMT_lx for env->mhartid
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From: |
Alistair Francis |
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Subject: |
[PULL 25/37] target/riscv: Use TARGET_FMT_lx for env->mhartid |
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Date: |
Fri, 20 Jan 2023 17:39:01 +1000 |
From: Bin Meng <bmeng@tinylab.org>
env->mhartid is currently casted to long before printed, which drops
the high 32-bit for rv64 on 32-bit host. Use TARGET_FMT_lx instead.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20230109152655.340114-1-bmeng@tinylab.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/cpu.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index c192d96a94..14a7027095 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -867,9 +867,9 @@ static void riscv_cpu_realize(DeviceState *dev, Error
**errp)
(env->priv_ver < isa_edata_arr[i].min_version)) {
isa_ext_update_enabled(cpu, &isa_edata_arr[i], false);
#ifndef CONFIG_USER_ONLY
- warn_report("disabling %s extension for hart 0x%lx because "
- "privilege spec version does not match",
- isa_edata_arr[i].name, (unsigned long)env->mhartid);
+ warn_report("disabling %s extension for hart 0x" TARGET_FMT_lx
+ " because privilege spec version does not match",
+ isa_edata_arr[i].name, env->mhartid);
#else
warn_report("disabling %s extension because "
"privilege spec version does not match",
--
2.39.0
- [PULL 17/37] hw/riscv/boot.c: exit early if filename is NULL in load functions, (continued)
- [PULL 17/37] hw/riscv/boot.c: exit early if filename is NULL in load functions, Alistair Francis, 2023/01/20
- [PULL 18/37] hw/riscv/spike.c: load initrd right after riscv_load_kernel(), Alistair Francis, 2023/01/20
- [PULL 19/37] hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd(), Alistair Francis, 2023/01/20
- [PULL 20/37] hw/riscv: write bootargs 'chosen' FDT after riscv_load_kernel(), Alistair Francis, 2023/01/20
- [PULL 21/37] hw/riscv/boot.c: use MachineState in riscv_load_initrd(), Alistair Francis, 2023/01/20
- [PULL 22/37] hw/riscv/boot.c: use MachineState in riscv_load_kernel(), Alistair Francis, 2023/01/20
- [PULL 23/37] target/riscv/cpu: set cpu->cfg in register_cpu_props(), Alistair Francis, 2023/01/20
- [PULL 24/37] target/riscv/cpu.c: do not skip misa logic in riscv_cpu_realize(), Alistair Francis, 2023/01/20
- [PULL 26/37] hw/riscv/spike.c: simplify create_fdt(), Alistair Francis, 2023/01/20
- [PULL 28/37] hw/riscv/sifive_u.c: simplify create_fdt(), Alistair Francis, 2023/01/20
- [PULL 25/37] target/riscv: Use TARGET_FMT_lx for env->mhartid,
Alistair Francis <=
- [PULL 30/37] hw/riscv: use MachineState::fdt in riscv_socket_fdt_write_id(), Alistair Francis, 2023/01/20
- [PULL 27/37] hw/riscv/virt.c: simplify create_fdt(), Alistair Francis, 2023/01/20
- [PULL 31/37] hw/riscv: use ms->fdt in riscv_socket_fdt_write_distance_matrix(), Alistair Francis, 2023/01/20
- [PULL 29/37] hw/riscv/virt.c: remove 'is_32_bit' param from create_fdt_socket_cpus(), Alistair Francis, 2023/01/20
- [PULL 32/37] target/riscv: Fix up masking of vsip/vsie accesses, Alistair Francis, 2023/01/20
- [PULL 33/37] target/riscv: Trap on writes to stimecmp from VS when hvictl.VTI=1, Alistair Francis, 2023/01/20
- [PULL 34/37] tcg/riscv: Use tcg_pcrel_diff in tcg_out_ldst, Alistair Francis, 2023/01/20
- [PULL 35/37] target/riscv: Introduce helper_set_rounding_mode_chkfrm, Alistair Francis, 2023/01/20
- [PULL 37/37] hw/riscv/virt.c: move create_fw_cfg() back to virt_machine_init(), Alistair Francis, 2023/01/20
- [PULL 36/37] target/riscv: Remove helper_set_rod_rounding_mode, Alistair Francis, 2023/01/20