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[PULL 04/27] tcg/s390x: Remove USE_LONG_BRANCHES
From: |
Richard Henderson |
Subject: |
[PULL 04/27] tcg/s390x: Remove USE_LONG_BRANCHES |
Date: |
Fri, 6 Jan 2023 23:50:55 -0800 |
The size of a compiled TB is limited by the uint16_t used by
gen_insn_end_off[] -- there is no need for a 32-bit branch.
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/s390x/tcg-target.c.inc | 9 ---------
1 file changed, 9 deletions(-)
diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc
index 2cdd0d7a92..dea889ffa1 100644
--- a/tcg/s390x/tcg-target.c.inc
+++ b/tcg/s390x/tcg-target.c.inc
@@ -33,11 +33,6 @@
#include "../tcg-pool.c.inc"
#include "elf.h"
-/* ??? The translation blocks produced by TCG are generally small enough to
- be entirely reachable with a 16-bit displacement. Leaving the option for
- a 32-bit displacement here Just In Case. */
-#define USE_LONG_BRANCHES 0
-
#define TCG_CT_CONST_S16 0x100
#define TCG_CT_CONST_S32 0x200
#define TCG_CT_CONST_S33 0x400
@@ -1525,10 +1520,6 @@ static void tgen_branch(TCGContext *s, int cc, TCGLabel
*l)
{
if (l->has_value) {
tgen_gotoi(s, cc, l->u.value_ptr);
- } else if (USE_LONG_BRANCHES) {
- tcg_out16(s, RIL_BRCL | (cc << 4));
- tcg_out_reloc(s, s->code_ptr, R_390_PC32DBL, l, 2);
- s->code_ptr += 2;
} else {
tcg_out16(s, RI_BRC | (cc << 4));
tcg_out_reloc(s, s->code_ptr, R_390_PC16DBL, l, 2);
--
2.34.1
- [PULL 00/27] tcg/s390x patch queue, Richard Henderson, 2023/01/07
- [PULL 02/27] tcg/s390x: Remove TCG_REG_TB, Richard Henderson, 2023/01/07
- [PULL 01/27] tcg/s390x: Use register pair allocation for div and mulu2, Richard Henderson, 2023/01/07
- [PULL 03/27] tcg/s390x: Always set TCG_TARGET_HAS_direct_jump, Richard Henderson, 2023/01/07
- [PULL 06/27] tcg/s390x: Check for extended-immediate facility at startup, Richard Henderson, 2023/01/07
- [PULL 08/27] tcg/s390x: Check for load-on-condition facility at startup, Richard Henderson, 2023/01/07
- [PULL 12/27] tcg/s390x: Distinguish RRF-a and RRF-c formats, Richard Henderson, 2023/01/07
- [PULL 15/27] tcg/s390x: Support MIE2 MGRK instruction, Richard Henderson, 2023/01/07
- [PULL 16/27] tcg/s390x: Issue XILF directly for xor_i32, Richard Henderson, 2023/01/07
- [PULL 09/27] tcg/s390x: Remove FAST_BCR_SER facility check, Richard Henderson, 2023/01/07
- [PULL 04/27] tcg/s390x: Remove USE_LONG_BRANCHES,
Richard Henderson <=
- [PULL 07/27] tcg/s390x: Check for general-instruction-extension facility at startup, Richard Henderson, 2023/01/07
- [PULL 05/27] tcg/s390x: Check for long-displacement facility at startup, Richard Henderson, 2023/01/07
- [PULL 11/27] tcg/s390x: Use LARL+AGHI for odd addresses, Richard Henderson, 2023/01/07
- [PULL 10/27] tcg/s390x: Remove DISTINCT_OPERANDS facility check, Richard Henderson, 2023/01/07
- [PULL 13/27] tcg/s390x: Distinguish RIE formats, Richard Henderson, 2023/01/07
- [PULL 14/27] tcg/s390x: Support MIE2 multiply single instructions, Richard Henderson, 2023/01/07
- [PULL 19/27] tcg/s390x: Support MIE3 logical operations, Richard Henderson, 2023/01/07
- [PULL 23/27] tcg/s390x: Use tgen_movcond_int in tgen_clz, Richard Henderson, 2023/01/07
- [PULL 25/27] tcg/s390x: Tighten constraints for 64-bit compare, Richard Henderson, 2023/01/07
- [PULL 17/27] tcg/s390x: Tighten constraints for or_i64 and xor_i64, Richard Henderson, 2023/01/07