[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v5 04/11] hw/riscv/boot.c: exit early if filename is NULL in load
From: |
Daniel Henrique Barboza |
Subject: |
[PATCH v5 04/11] hw/riscv/boot.c: exit early if filename is NULL in load functions |
Date: |
Mon, 2 Jan 2023 08:52:34 -0300 |
riscv_load_firmware(), riscv_load_initrd() and riscv_load_kernel() works
under the assumption that a 'filename' parameter is always not NULL.
This is currently the case since all callers of these functions are
checking for NULL before calling them. Add an g_assert() to make sure
that a NULL value in these cases are to be considered a bug.
Suggested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
---
hw/riscv/boot.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c
index 98b80af51b..31aa3385a0 100644
--- a/hw/riscv/boot.c
+++ b/hw/riscv/boot.c
@@ -153,6 +153,8 @@ target_ulong riscv_load_firmware(const char
*firmware_filename,
uint64_t firmware_entry, firmware_end;
ssize_t firmware_size;
+ g_assert(firmware_filename != NULL);
+
if (load_elf_ram_sym(firmware_filename, NULL, NULL, NULL,
&firmware_entry, NULL, &firmware_end, NULL,
0, EM_RISCV, 1, 0, NULL, true, sym_cb) > 0) {
@@ -177,6 +179,8 @@ target_ulong riscv_load_kernel(const char *kernel_filename,
{
uint64_t kernel_load_base, kernel_entry;
+ g_assert(kernel_filename != NULL);
+
/*
* NB: Use low address not ELF entry point to ensure that the fw_dynamic
* behaviour when loading an ELF matches the fw_payload, fw_jump and BBL
@@ -209,6 +213,8 @@ hwaddr riscv_load_initrd(const char *filename, uint64_t
mem_size,
{
ssize_t size;
+ g_assert(filename != NULL);
+
/*
* We want to put the initrd far enough into RAM that when the
* kernel is uncompressed it will not clobber the initrd. However
--
2.39.0
- [PATCH v5 00/11] riscv: OpenSBI boot test and cleanups, Daniel Henrique Barboza, 2023/01/02
- [PATCH v5 01/11] tests/avocado: add RISC-V OpenSBI boot test, Daniel Henrique Barboza, 2023/01/02
- [PATCH v5 02/11] hw/riscv/spike: use 'fdt' from MachineState, Daniel Henrique Barboza, 2023/01/02
- [PATCH v5 03/11] hw/riscv/sifive_u: use 'fdt' from MachineState, Daniel Henrique Barboza, 2023/01/02
- [PATCH v5 04/11] hw/riscv/boot.c: exit early if filename is NULL in load functions,
Daniel Henrique Barboza <=
- [PATCH v5 05/11] hw/riscv/spike.c: load initrd right after riscv_load_kernel(), Daniel Henrique Barboza, 2023/01/02
- [PATCH v5 06/11] hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd(), Daniel Henrique Barboza, 2023/01/02
- [PATCH v5 07/11] hw/riscv: write bootargs 'chosen' FDT after riscv_load_kernel(), Daniel Henrique Barboza, 2023/01/02
- [PATCH v5 08/11] hw/riscv/boot.c: use MachineState in riscv_load_initrd(), Daniel Henrique Barboza, 2023/01/02
- [PATCH v5 09/11] hw/riscv/boot.c: use MachineState in riscv_load_kernel(), Daniel Henrique Barboza, 2023/01/02