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Re: [PATCH v2] vfio/pci: Verify each MSI vector to avoid invalid MSI vec


From: Marc Zyngier
Subject: Re: [PATCH v2] vfio/pci: Verify each MSI vector to avoid invalid MSI vectors
Date: Thu, 24 Nov 2022 13:19:22 +0000
User-agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (Gojō) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO)

On Wed, 23 Nov 2022 19:55:14 +0000,
Alex Williamson <alex.williamson@redhat.com> wrote:
> 
> On Wed, 23 Nov 2022 12:08:05 +0000
> Marc Zyngier <maz@kernel.org> wrote:
> 
> > On Wed, 23 Nov 2022 01:42:36 +0000,
> > chenxiang <chenxiang66@hisilicon.com> wrote:
> > > 
> > > +static int vfio_pci_verify_msi_entry(struct vfio_pci_core_device *vdev,
> > > +         struct eventfd_ctx *trigger)
> > > +{
> > > + struct kvm *kvm = vdev->vdev.kvm;
> > > + struct kvm_kernel_irqfd *tmp;
> > > + struct kvm_kernel_irq_routing_entry irq_entry;
> > > + int ret = -ENODEV;
> > > +
> > > + spin_lock_irq(&kvm->irqfds.lock);
> > > + list_for_each_entry(tmp, &kvm->irqfds.items, list) {
> > > +         if (trigger == tmp->eventfd) {
> > > +                 ret = 0;
> > > +                 break;
> > > +         }
> > > + }
> > > + spin_unlock_irq(&kvm->irqfds.lock);
> > > + if (ret)
> > > +         return ret;
> > > + irq_entry = tmp->irq_entry;
> > > + return kvm_verify_msi(kvm, &irq_entry);  
> > 
> > How does this work on !arm64? Why do we need an on-stack version of
> > tmp->irq_entry?
> 
> Not only on !arm64, but in any scenario that doesn't involve KVM.
> There cannot be a hard dependency between vfio and kvm.  Thanks,

Yup, good point.

> 
> Alex
> 
> PS - What driver/device actually cares about more than 1 MSI vector and
> doesn't implement MSI-X?

Unfortunately, there is a metric ton of crap that fits in that
description:

01:00.0 Network controller: Broadcom Inc. and subsidiaries Device 4433 (rev 07)
        Subsystem: Apple Inc. Device 4387
        Device tree node: 
/sys/firmware/devicetree/base/soc/pcie@690000000/pci@0,0/wifi@0,0
        Flags: bus master, fast devsel, latency 0, IRQ 97, IOMMU group 4
        Memory at 6c1400000 (64-bit, non-prefetchable) [size=64K]
        Memory at 6c0000000 (64-bit, non-prefetchable) [size=16M]
        Capabilities: [48] Power Management version 3
        Capabilities: [58] MSI: Enable+ Count=1/32 Maskable- 64bit+

... and no MSI-X in sight. Pass this to a VM, and you'll see exactly
what is described here. And that's not old stuff either. This is brand
new HW.

Do we need to care? I don't think so.

        M.

-- 
Without deviation from the norm, progress is not possible.



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