Instruction concurrent modification issue of direct jump in AArch64

[hev]

Hello,

I talked with Hu Qi about the risk of instruction concurrent
modification in TCG direct jump for LoongArch, and the conclusion is
that the implementation is correct.

Similarly, the AArch64 implementation doesn't seem to be quite
correct. IIUC, multiple instructions paired with an atomic write does
not guarantee atomic effects on the execution side.

For example, the issue in AArch64 is:

Instruction concurrent modification:

* Before:
  adrp
  addi
  br

* After
  b
  nop
  br

* May actually execution:
  adrp
  nop
  br

That will cause the jump to an unexpected address to execute, What do you think?

Regards,
Ray