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Re: [PATCH RFC 2/3] hw/i2c: add mctp core
From: |
Jeremy Kerr |
Subject: |
Re: [PATCH RFC 2/3] hw/i2c: add mctp core |
Date: |
Fri, 18 Nov 2022 15:09:57 +0800 |
User-agent: |
Evolution 3.46.1-1 |
Hi Klaus,
> I had to reverse the target mode functionality in QEMU from the linux
> driver, so I am really not too sure if having START and STOP set in
> the interrupt register is allowed behavior or not
>From my interpretation of things, there's nothing explicitly preventing
both a pending start and stop - more that the interrupt is very likely
to have been serviced between those two events on the kind of speeds we
would see on the i2c bus.
I guess we could try (temporarily) masking the irq on real hardware and
see what happens? :D
Cheers,
Jeremy
- Re: [PATCH maybe-7.2 1/3] hw/i2c: only schedule pending master when bus is idle, (continued)
[PATCH RFC 2/3] hw/i2c: add mctp core, Klaus Jensen, 2022/11/16
Re: [PATCH RFC 2/3] hw/i2c: add mctp core, Klaus Jensen, 2022/11/18
Re: [PATCH RFC 2/3] hw/i2c: add mctp core, Matt Johnston, 2022/11/21
[PATCH RFC 3/3] hw/nvme: add nvme management interface model, Klaus Jensen, 2022/11/16
Re: [PATCH 0/3] hw/{i2c,nvme}: mctp endpoint, nvme management interface model, Jeremy Kerr, 2022/11/16