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[PULL 0/2] target-arm queue for rc1
From: |
Peter Maydell |
Subject: |
[PULL 0/2] target-arm queue for rc1 |
Date: |
Mon, 14 Nov 2022 15:51:59 +0000 |
Hi; here's the arm pullreq for rc1. Just one bugfix and
a MAINTAINERS file update...
thanks
-- PMM
The following changes since commit 305f6f62d9d250a32cdf090ddcb7e3a5b26a342e:
Merge tag 'pull-la-20221112' of https://gitlab.com/rth7680/qemu into staging
(2022-11-12 09:17:06 -0500)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20221114
for you to fetch changes up to d9721f19cd05a382f4f5a7093c80d1c4a8a1aa82:
hw/intc/arm_gicv3: fix prio masking on pmr write (2022-11-14 15:10:58 +0000)
----------------------------------------------------------------
target-arm queue:
* hw/intc/arm_gicv3: fix prio masking on pmr write
* MAINTAINERS: Update maintainer's email for Xilinx CAN
----------------------------------------------------------------
Jens Wiklander (1):
hw/intc/arm_gicv3: fix prio masking on pmr write
Vikram Garhwal (1):
MAINTAINERS: Update maintainer's email for Xilinx CAN
hw/intc/arm_gicv3_cpuif.c | 3 +--
MAINTAINERS | 4 ++--
2 files changed, 3 insertions(+), 4 deletions(-)
- [PULL 0/2] target-arm queue for rc1,
Peter Maydell <=