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RE: [PATCH v4 10/11] Hexagon (target/hexagon) Use direct block chaining


From: Taylor Simpson
Subject: RE: [PATCH v4 10/11] Hexagon (target/hexagon) Use direct block chaining for direct jump/branch
Date: Wed, 9 Nov 2022 15:35:35 +0000


> -----Original Message-----
> From: Richard Henderson <richard.henderson@linaro.org>
> Sent: Tuesday, November 8, 2022 7:41 PM
> To: Taylor Simpson <tsimpson@quicinc.com>; qemu-devel@nongnu.org
> Cc: philmd@linaro.org; ale@rev.ng; anjo@rev.ng; Brian Cain
> <bcain@quicinc.com>; Matheus Bernardino (QUIC)
> <quic_mathbern@quicinc.com>
> Subject: Re: [PATCH v4 10/11] Hexagon (target/hexagon) Use direct block
> chaining for direct jump/branch
> 
> >> -----Original Message-----
> >> From: Richard Henderson <richard.henderson@linaro.org>
> >> Sent: Tuesday, November 8, 2022 1:24 AM
> >> To: Taylor Simpson <tsimpson@quicinc.com>; qemu-devel@nongnu.org
> >> Cc: philmd@linaro.org; ale@rev.ng; anjo@rev.ng; Brian Cain
> >> <bcain@quicinc.com>; Matheus Bernardino (QUIC)
> >> <quic_mathbern@quicinc.com>
> >> Subject: Re: [PATCH v4 10/11] Hexagon (target/hexagon) Use direct
> >> block chaining for direct jump/branch
> >>
> >> On 11/8/22 15:05, Taylor Simpson wrote:
> >>>    static void hexagon_tr_tb_start(DisasContextBase *db, CPUState
> *cpu)
> >>>    {
> >>> +    DisasContext *ctx = container_of(db, DisasContext, base);
> >>> +    ctx->branch_cond = TCG_COND_NEVER;
> >>>    }
> >>
> >> Typically this would go in hexagon_tr_init_disas_context as well, but
> >> I don't suppose it really matters.
> >
> > AFAICT, these are always called back to back.  So, it's not clear to me what
> the distinction should be.
> 
> ops->tb_start is called after gen_tb_start, so you can emit code that
> ops->comes after the
> interrupt/icount check, but before the first guest instruction.  Rarely 
> needed,
> should probably be allowed to be NULL.

OK, I will move this to init_disas_context.

Thanks,
Taylor


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