Re: [PATCH v1 1/4] target/riscv: Add itrigger support when icount is not enabled

[LIU Zhiwei]

On 2022/11/7 23:58, Alex Bennée wrote:

> LIU Zhiwei <zhiwei_liu@linux.alibaba.com> writes:
>
> > On 2022/11/7 9:37, Alistair Francis wrote:
> > > On Thu, Oct 13, 2022 at 4:32 PM LIU Zhiwei <zhiwei_liu@linux.alibaba.com> wrote:
> > > > When icount is not enabled, there is no API in QEMU that can get the
> > > > guest instruction number.
> > > >
> > > > Translate the guest code in a way that each TB only has one instruction.
> > > >           
> > > I don't think this is a great idea.
> > >
> > > Why can't we just require icount be enabled if a user wants this? Or singlestep?
> > >         
> > This feature will only be used by users who want to  run the native
> > gdb on Linux. If we run QEMU as a service,  after booting the kernel,
> > we can't predicate whether the users will use native gdb.
> >
> > Besides, icount can't be enabled on MTTCG currently (I am working on
> > this problem)
> >       
> I'm curious as to what your approach is going to be to solve this one?
>

Yes, I am interested in this problem.  But actually, I don't find a clear way.

For RR or MTTCG, timers using QEMU_CLOCK_VIRTUAL will set the total icount_budget.

• For RR smp, every cpu has configured the total icount_budget.

• For MTTCG smp, every cpu can't be configured the total icount_budget.  But we can split the icount_budget, such as divide by smp.cpus, to each core. If one core consumed its budget, it will wait for other cores.  Another way is to kick other cores and split the remaining icount_budget.
  

I am not sure if there are many other problems related.  It a difficult problem. Looking forward to your advice.

Thanks,
Zhiwei

>