Re: [PATCH v3] target/arm: honor HCR_E2H and HCR_TGE in ats_write64()

[Richard Henderson]

On 11/1/22 17:42, Ake Koomsin wrote:
> We need to check HCR_E2H and HCR_TGE to select the right MMU index for
> the correct translation regime.
>
> To check for EL2&0 translation regime:
> - For S1E0*, S1E1* and S12E* ops, check both HCR_E2H and HCR_TGE
> - For S1E2* ops, check only HCR_E2H
>
> Signed-off-by: Ake Koomsin<ake@igel.co.jp>
> ---
>
> v3:
> - Avoid recomputing arm_hcr_el2_eff() as recommended by Richard H.
> - Use ':?' for more compact code as recommended by Richard H.
>
> v2:
> - Rebase with the latest upstream
> - It turns out that we need to check both HCR_E2H and HCR_TGE for
>    S1E0*, S1E1* and S12E* address translation as well according to the
>    Architecture Manual.
> -https://lists.gnu.org/archive/html/qemu-devel/2022-10/msg06084.html
>
> v1:
> https://lists.gnu.org/archive/html/qemu-devel/2022-10/msg02627.html
>
>   target/arm/helper.c | 15 +++++++++------
>   1 file changed, 9 insertions(+), 6 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~