This is a respin of Bernhard's v4 with Freescale eSDHC implemented
as an 'UNIMP' region. See v4 cover here:
https://lore.kernel.org/qemu-devel/20221018210146.193159-1-shentey@gmail.com/
Only tested with the ppce500 machine (no further regression testing).
Since v4:
- Do not rename ESDHC_* definitions to USDHC_*
- Do not modify SDHCIState structure
Works beautifully, both for the buildroot load and for my proprietary load. So:
Bernhard Beschow (4):
hw/block/pflash_cfi0{1, 2}: Error out if device length isn't a power
of two
docs/system/ppc/ppce500: Use qemu-system-ppc64 across the board(s)
hw/ppc/e500: Implement pflash handling
hw/ppc/e500: Add Freescale eSDHC to e500plat
Philippe Mathieu-Daudé (2):
hw/sd/sdhci: MMIO region is implemented in 32-bit accesses
hw/sd/sdhci: Map host controller interface in host endianess
docs/system/ppc/ppce500.rst | 38 +++++++++--
hw/block/pflash_cfi01.c | 8 ++-
hw/block/pflash_cfi02.c | 5 ++
hw/ppc/Kconfig | 3 +
hw/ppc/e500.c | 127 +++++++++++++++++++++++++++++++++++-
hw/ppc/e500.h | 1 +
hw/ppc/e500plat.c | 1 +
hw/sd/sdhci.c | 6 +-
8 files changed, 180 insertions(+), 9 deletions(-)
--
2.37.3