Re: [PATCH v2] target/arm: honor HCR_E2H and HCR_TGE in ats_write64()

[Richard Henderson]

On 10/31/22 19:43, Ake Koomsin wrote:
> We need to check HCR_E2H and HCR_TGE to select the right MMU index for
> the correct translation regime.
>
> To check for EL2&0 translation regime:
> - For S1E0*, S1E1* and S12E* ops, check both HCR_E2H and HCR_TGE
> - For S1E2* ops, check only HCR_E2H
>
> Signed-off-by: Ake Koomsin <ake@igel.co.jp>
> ---
>
> v2:
> - Rebase with the latest upstream
> - It turns out that we need to check both HCR_E2H and HCR_TGE for
>    S1E0*, S1E1* and S12E* address translation as well according to the
>    Architecture Manual.
>
> v1:
> https://lists.gnu.org/archive/html/qemu-devel/2022-10/msg02627.html
>
>   target/arm/helper.c | 38 ++++++++++++++++++++++++++++++++------
>   1 file changed, 32 insertions(+), 6 deletions(-)
>
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index b070a20f1a..f7b988395a 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -3501,19 +3501,33 @@ static void ats_write64(CPUARMState *env, const 
> ARMCPRegInfo *ri,
>       MMUAccessType access_type = ri->opc2 & 1 ? MMU_DATA_STORE : MMU_DATA_LOAD;
>       ARMMMUIdx mmu_idx;
>       int secure = arm_is_secure_below_el3(env);
> +    bool regime_e20 = (arm_hcr_el2_eff(env) & (HCR_E2H | HCR_TGE)) ==
> +                      (HCR_E2H | HCR_TGE);

Record arm_hcr_el2_eff in a local here...

>           case 4: /* AT S1E2R, AT S1E2W */
> -            mmu_idx = ARMMMUIdx_E2;
> +            if ((arm_hcr_el2_eff(env) & HCR_E2H) == HCR_E2H) {

... so you don't need to recompute it here.
Also, you can drop the "==" since HCR_E2H is a single bit.

The rest could perhaps be more compact with "?:", but is ok.


r~