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[PATCH v2 33/43] hw/isa/piix4: Reuse struct PIIXState from PIIX3
From: |
Bernhard Beschow |
Subject: |
[PATCH v2 33/43] hw/isa/piix4: Reuse struct PIIXState from PIIX3 |
Date: |
Sat, 22 Oct 2022 17:04:58 +0200 |
Now that PIIX4 also uses the "isa-pic" proxy, both implementations
can share the same struct.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
hw/isa/piix4.c | 61 ++++++++++++++++----------------------------------
1 file changed, 19 insertions(+), 42 deletions(-)
diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c
index 8ddff23116..a7d52c5294 100644
--- a/hw/isa/piix4.c
+++ b/hw/isa/piix4.c
@@ -42,34 +42,10 @@
#include "sysemu/runstate.h"
#include "qom/object.h"
-struct PIIX4State {
- PCIDevice dev;
-
- ISAPICState pic;
- RTCState rtc;
- PCIIDEState ide;
- UHCIState uhci;
- PIIX4PMState pm;
-
- uint32_t smb_io_base;
-
- /* Reset Control Register */
- MemoryRegion rcr_mem;
- uint8_t rcr;
-
- uint8_t pci_irq_reset_mappings[PIIX_NUM_PIRQS];
-
- bool has_acpi;
- bool has_usb;
- bool smm_enabled;
-};
-
-OBJECT_DECLARE_SIMPLE_TYPE(PIIX4State, PIIX4_PCI_DEVICE)
-
static void piix4_set_irq(void *opaque, int irq_num, int level)
{
int i, pic_irq, pic_level;
- PIIX4State *s = opaque;
+ PIIXState *s = opaque;
PCIBus *bus = pci_get_bus(&s->dev);
/* now we change the pic irq level according to the piix irq mappings */
@@ -114,7 +90,7 @@ static int pci_slot_get_pirq(PCIDevice *pci_dev, int irq_num)
static void piix4_isa_reset(DeviceState *dev)
{
- PIIX4State *d = PIIX4_PCI_DEVICE(dev);
+ PIIXState *d = PIIX_PCI_DEVICE(dev);
uint8_t *pci_conf = d->dev.config;
pci_conf[0x04] = 0x07; // master, memory and I/O
@@ -149,12 +125,13 @@ static void piix4_isa_reset(DeviceState *dev)
pci_conf[0xac] = 0x00;
pci_conf[0xae] = 0x00;
+ d->pic_levels = 0; /* not used in PIIX4 */
d->rcr = 0;
}
static int piix4_post_load(void *opaque, int version_id)
{
- PIIX4State *s = opaque;
+ PIIXState *s = opaque;
if (version_id == 2) {
s->rcr = 0;
@@ -169,8 +146,8 @@ static const VMStateDescription vmstate_piix4 = {
.minimum_version_id = 2,
.post_load = piix4_post_load,
.fields = (VMStateField[]) {
- VMSTATE_PCI_DEVICE(dev, PIIX4State),
- VMSTATE_UINT8_V(rcr, PIIX4State, 3),
+ VMSTATE_PCI_DEVICE(dev, PIIXState),
+ VMSTATE_UINT8_V(rcr, PIIXState, 3),
VMSTATE_END_OF_LIST()
}
};
@@ -178,7 +155,7 @@ static const VMStateDescription vmstate_piix4 = {
static void piix4_rcr_write(void *opaque, hwaddr addr, uint64_t val,
unsigned int len)
{
- PIIX4State *s = opaque;
+ PIIXState *s = opaque;
if (val & 4) {
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
@@ -190,7 +167,7 @@ static void piix4_rcr_write(void *opaque, hwaddr addr,
uint64_t val,
static uint64_t piix4_rcr_read(void *opaque, hwaddr addr, unsigned int len)
{
- PIIX4State *s = opaque;
+ PIIXState *s = opaque;
return s->rcr;
}
@@ -207,7 +184,7 @@ static const MemoryRegionOps piix4_rcr_ops = {
static void piix4_realize(PCIDevice *dev, Error **errp)
{
- PIIX4State *s = PIIX4_PCI_DEVICE(dev);
+ PIIXState *s = PIIX_PCI_DEVICE(dev);
PCIBus *pci_bus = pci_get_bus(dev);
ISABus *isa_bus;
@@ -277,7 +254,7 @@ static void piix4_realize(PCIDevice *dev, Error **errp)
static void piix4_init(Object *obj)
{
- PIIX4State *s = PIIX4_PCI_DEVICE(obj);
+ PIIXState *s = PIIX_PCI_DEVICE(obj);
object_initialize_child(obj, "pic", &s->pic, TYPE_ISA_PIC);
object_initialize_child(obj, "rtc", &s->rtc, TYPE_MC146818_RTC);
@@ -285,14 +262,14 @@ static void piix4_init(Object *obj)
}
static Property piix4_props[] = {
- DEFINE_PROP_UINT32("smb_io_base", PIIX4State, smb_io_base, 0),
- DEFINE_PROP_UINT8("pirqa", PIIX4State, pci_irq_reset_mappings[0], 0x80),
- DEFINE_PROP_UINT8("pirqb", PIIX4State, pci_irq_reset_mappings[1], 0x80),
- DEFINE_PROP_UINT8("pirqc", PIIX4State, pci_irq_reset_mappings[2], 0x80),
- DEFINE_PROP_UINT8("pirqd", PIIX4State, pci_irq_reset_mappings[3], 0x80),
- DEFINE_PROP_BOOL("has-acpi", PIIX4State, has_acpi, true),
- DEFINE_PROP_BOOL("has-usb", PIIX4State, has_usb, true),
- DEFINE_PROP_BOOL("smm-enabled", PIIX4State, smm_enabled, false),
+ DEFINE_PROP_UINT32("smb_io_base", PIIXState, smb_io_base, 0),
+ DEFINE_PROP_UINT8("pirqa", PIIXState, pci_irq_reset_mappings[0], 0x80),
+ DEFINE_PROP_UINT8("pirqb", PIIXState, pci_irq_reset_mappings[1], 0x80),
+ DEFINE_PROP_UINT8("pirqc", PIIXState, pci_irq_reset_mappings[2], 0x80),
+ DEFINE_PROP_UINT8("pirqd", PIIXState, pci_irq_reset_mappings[3], 0x80),
+ DEFINE_PROP_BOOL("has-acpi", PIIXState, has_acpi, true),
+ DEFINE_PROP_BOOL("has-usb", PIIXState, has_usb, true),
+ DEFINE_PROP_BOOL("smm-enabled", PIIXState, smm_enabled, false),
DEFINE_PROP_END_OF_LIST(),
};
@@ -320,7 +297,7 @@ static void piix4_class_init(ObjectClass *klass, void *data)
static const TypeInfo piix4_info = {
.name = TYPE_PIIX4_PCI_DEVICE,
.parent = TYPE_PCI_DEVICE,
- .instance_size = sizeof(PIIX4State),
+ .instance_size = sizeof(PIIXState),
.instance_init = piix4_init,
.class_init = piix4_class_init,
.interfaces = (InterfaceInfo[]) {
--
2.38.1
- Re: [PATCH v2 24/43] hw/isa/piix3: Rename typedef PIIX3State to PIIXState, (continued)
- [PATCH v2 25/43] hw/mips/malta: Reuse dev variable, Bernhard Beschow, 2022/10/22
- [PATCH v2 26/43] meson: Fix dependencies of piix4 southbridge, Bernhard Beschow, 2022/10/22
- [PATCH v2 27/43] hw/isa/piix4: Add missing initialization, Bernhard Beschow, 2022/10/22
- [PATCH v2 28/43] hw/isa/piix4: Move pci_ide_create_devs() call to board code, Bernhard Beschow, 2022/10/22
- [PATCH v2 29/43] hw/isa/piix4: Make PIIX4's ACPI and USB functions optional, Bernhard Beschow, 2022/10/22
- [PATCH v2 30/43] hw/isa/piix4: Allow board to provide PCI interrupt routes, Bernhard Beschow, 2022/10/22
- [PATCH v2 31/43] hw/isa/piix4: Remove unused code, Bernhard Beschow, 2022/10/22
- [PATCH v2 32/43] hw/isa/piix4: Use ISA PIC device, Bernhard Beschow, 2022/10/22
- [PATCH v2 33/43] hw/isa/piix4: Reuse struct PIIXState from PIIX3,
Bernhard Beschow <=
- [PATCH v2 34/43] hw/isa/piix4: Rename reset control operations to match PIIX3, Bernhard Beschow, 2022/10/22
- [PATCH v2 35/43] hw/isa/piix4: Prefix pci_slot_get_pirq() with "piix4_", Bernhard Beschow, 2022/10/22
- [PATCH v2 37/43] hw/isa/piix: Harmonize names of reset control memory regions, Bernhard Beschow, 2022/10/22
- [PATCH v2 36/43] hw/isa/piix3: Merge hw/isa/piix4.c, Bernhard Beschow, 2022/10/22
- [PATCH v2 38/43] hw/isa/piix: Reuse PIIX3 base class' realize method in PIIX4, Bernhard Beschow, 2022/10/22
- [PATCH v2 39/43] hw/isa/piix: Rename functions to be shared for interrupt triggering, Bernhard Beschow, 2022/10/22
- [PATCH v2 40/43] hw/isa/piix: Consolidate IRQ triggering, Bernhard Beschow, 2022/10/22
- [PATCH v2 41/43] hw/isa/piix: Share PIIX3 base class with PIIX4, Bernhard Beschow, 2022/10/22