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[PATCH v2 16/43] hw/isa/piix3: Create IDE controller in host device
From: |
Bernhard Beschow |
Subject: |
[PATCH v2 16/43] hw/isa/piix3: Create IDE controller in host device |
Date: |
Sat, 22 Oct 2022 17:04:41 +0200 |
Now that PIIX3 contains the new isa-pic, it is possible to instantiate
PIIX3 IDE in the PIIX3 southbridge. PIIX3 IDE wires up its interrupts to
the ISA bus in its realize method which requires the interrupt
controller to provide fully populated qemu_irqs. This is the case for
isa-pic even though the virtualization technology not known yet.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
hw/i386/Kconfig | 1 -
hw/i386/pc_piix.c | 15 ++++++---------
hw/isa/Kconfig | 1 +
hw/isa/piix3.c | 8 ++++++++
include/hw/southbridge/piix.h | 2 ++
5 files changed, 17 insertions(+), 10 deletions(-)
diff --git a/hw/i386/Kconfig b/hw/i386/Kconfig
index d22ac4a4b9..dd247f215c 100644
--- a/hw/i386/Kconfig
+++ b/hw/i386/Kconfig
@@ -74,7 +74,6 @@ config I440FX
select ACPI_SMBUS
select PCI_I440FX
select PIIX3
- select IDE_PIIX
select DIMM
select SMBIOS
select FW_CFG_DMA
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index f81e91220f..19fe07a13b 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -41,7 +41,6 @@
#include "hw/usb.h"
#include "net/net.h"
#include "hw/ide/pci.h"
-#include "hw/ide/piix.h"
#include "hw/irq.h"
#include "sysemu/kvm.h"
#include "hw/kvm/clock.h"
@@ -86,7 +85,6 @@ static void pc_init1(MachineState *machine,
PCIBus *pci_bus;
ISABus *isa_bus;
Object *piix4_pm;
- int piix3_devfn = -1;
qemu_irq smi_irq;
GSIState *gsi_state;
BusState *idebus[MAX_IDE_BUS];
@@ -236,11 +234,14 @@ static void pc_init1(MachineState *machine,
for (i = 0; i < ISA_NUM_IRQS; i++) {
qdev_connect_gpio_out(dev, i, x86ms->gsi[i]);
}
- piix3_devfn = pci_dev->devfn;
isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(pci_dev), "isa.0"));
rtc_state = ISA_DEVICE(object_resolve_path_component(OBJECT(pci_dev),
"rtc"));
piix4_pm = object_resolve_path_component(OBJECT(pci_dev), "pm");
+ dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "ide"));
+ pci_ide_create_devs(PCI_DEVICE(dev));
+ idebus[0] = qdev_get_child_bus(dev, "ide.0");
+ idebus[1] = qdev_get_child_bus(dev, "ide.1");
} else {
pci_bus = NULL;
piix4_pm = NULL;
@@ -254,6 +255,8 @@ static void pc_init1(MachineState *machine,
i8257_dma_init(isa_bus, 0);
pcms->hpet_enabled = false;
+ idebus[0] = NULL;
+ idebus[1] = NULL;
}
if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) {
@@ -282,12 +285,6 @@ static void pc_init1(MachineState *machine,
pc_nic_init(pcmc, isa_bus, pci_bus);
if (pcmc->pci_enabled) {
- PCIDevice *dev;
-
- dev = pci_create_simple(pci_bus, piix3_devfn + 1, TYPE_PIIX3_IDE);
- pci_ide_create_devs(dev);
- idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
- idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
}
#ifdef CONFIG_IDE_ISA
diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig
index 24e79a9a41..a021e1cbfc 100644
--- a/hw/isa/Kconfig
+++ b/hw/isa/Kconfig
@@ -36,6 +36,7 @@ config PIIX3
select ACPI_PIIX4
select I8257
select I8259
+ select IDE_PIIX
select ISA_BUS
select MC146818RTC
select USB_UHCI
diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c
index ce3ec84e22..bbd1dfc373 100644
--- a/hw/isa/piix3.c
+++ b/hw/isa/piix3.c
@@ -29,6 +29,7 @@
#include "hw/southbridge/piix.h"
#include "hw/irq.h"
#include "hw/qdev-properties.h"
+#include "hw/ide/piix.h"
#include "hw/isa/isa.h"
#include "hw/xen/xen.h"
#include "sysemu/xen.h"
@@ -329,6 +330,12 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp)
return;
}
+ /* IDE */
+ qdev_prop_set_int32(DEVICE(&d->ide), "addr", dev->devfn + 1);
+ if (!qdev_realize(DEVICE(&d->ide), BUS(pci_bus), errp)) {
+ return;
+ }
+
/* USB */
if (d->has_usb) {
object_initialize_child(OBJECT(dev), "uhci", &d->uhci,
@@ -370,6 +377,7 @@ static void pci_piix3_init(Object *obj)
object_initialize_child(obj, "pic", &d->pic, TYPE_ISA_PIC);
object_initialize_child(obj, "rtc", &d->rtc, TYPE_MC146818_RTC);
+ object_initialize_child(obj, "ide", &d->ide, TYPE_PIIX3_IDE);
}
static Property pci_piix3_props[] = {
diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h
index 7178147b75..1f22eb1444 100644
--- a/include/hw/southbridge/piix.h
+++ b/include/hw/southbridge/piix.h
@@ -15,6 +15,7 @@
#include "hw/pci/pci.h"
#include "qom/object.h"
#include "hw/acpi/piix4.h"
+#include "hw/ide/pci.h"
#include "hw/intc/i8259.h"
#include "hw/rtc/mc146818rtc.h"
#include "hw/usb/hcd-uhci.h"
@@ -56,6 +57,7 @@ struct PIIXState {
ISAPICState pic;
RTCState rtc;
+ PCIIDEState ide;
UHCIState uhci;
PIIX4PMState pm;
--
2.38.1
- Re: [PATCH v2 08/43] hw/ide/piix: Introduce TYPE_ macros for PIIX IDE controllers, (continued)
- [PATCH v2 06/43] hw/isa/piix3: Prefer pci_address_space() over get_system_memory(), Bernhard Beschow, 2022/10/22
- [PATCH v2 09/43] hw/usb/hcd-uhci: Introduce TYPE_ defines for device models, Bernhard Beschow, 2022/10/22
- [PATCH v2 10/43] hw/i386/pc: Create RTC controllers in south bridges, Bernhard Beschow, 2022/10/22
- [PATCH v2 11/43] hw/i386/pc: No need for rtc_state to be an out-parameter, Bernhard Beschow, 2022/10/22
- [PATCH v2 12/43] hw/isa/piix3: Create USB controller in host device, Bernhard Beschow, 2022/10/22
- [PATCH v2 13/43] hw/isa/piix3: Create power management controller in host device, Bernhard Beschow, 2022/10/22
- [PATCH v2 14/43] hw/intc/i8259: Introduce i8259 proxy "isa-pic", Bernhard Beschow, 2022/10/22
- [PATCH v2 15/43] hw/isa/piix3: Create ISA PIC in host device, Bernhard Beschow, 2022/10/22
- [PATCH v2 16/43] hw/isa/piix3: Create IDE controller in host device,
Bernhard Beschow <=
- [PATCH v2 17/43] hw/isa/piix3: Wire up ACPI interrupt internally, Bernhard Beschow, 2022/10/22
- [PATCH v2 18/43] hw/isa/piix3: Remove unused include, Bernhard Beschow, 2022/10/22
- [PATCH v2 19/43] hw/isa/piix3: Allow board to provide PCI interrupt routes, Bernhard Beschow, 2022/10/22
- [PATCH v2 20/43] hw/isa/piix3: Resolve redundant PIIX_NUM_PIC_IRQS, Bernhard Beschow, 2022/10/22
- [PATCH v2 21/43] hw/isa/piix3: Rename pci_piix3_props for sharing with PIIX4, Bernhard Beschow, 2022/10/22