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Re: [PATCH] RISC-V: Add support for Ztso


From: Palmer Dabbelt
Subject: Re: [PATCH] RISC-V: Add support for Ztso
Date: Sun, 02 Oct 2022 14:20:41 -0700 (PDT)

On Thu, 29 Sep 2022 12:16:48 PDT (-0700), dgilbert@redhat.com wrote:
* Palmer Dabbelt (palmer@rivosinc.com) wrote:
Ztso, the RISC-V extension that provides the TSO memory model, was
recently frozen.  This provides support for Ztso on targets that are
themselves TSO.

Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

---


diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index 00fcbe297d..2a43d54fcd 100644
--- a/tcg/i386/tcg-target.h
+++ b/tcg/i386/tcg-target.h
@@ -236,6 +236,7 @@ static inline void tb_target_set_jmp_target(uintptr_t 
tc_ptr, uintptr_t jmp_rx,
 #include "tcg/tcg-mo.h"

 #define TCG_TARGET_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD)
+#define TCG_TARGET_SUPPORTS_MCTCG_RVTSO 1

Is x86's brand of memory ordering strong enough for Ztso?
I thought x86 had an optimisation where it was allowed to store forward
within the current CPU causing stores not to be quite strictly ordered.

I'm actually not sure: my understanding of the Intel memory model was that there's a bunch of subtle bits that don't match the various TSO formalizations, but the RISC-V folks are pretty adamant that Intel is exactly TSO. I've gotten yelled at enough times on this one that I kind of just stopped caring, but that's not a good reason to have broken code so I'm happy to go fix it.

That said, when putting together the v2 (which has TCG barriers in the RISC-V front-end) I couldn't even really figure out how the TCG memory model works in any formal capacity -- I essentially just added the fences necessary for Ztso on RVWMO, but that's not a good proxy for Ztso on arm64 (and I guess not on x86, either). Also happy to go take a crack at that one, but I'm not really a formal memory model person so it might not be the best result.


Dave

 #define TCG_TARGET_HAS_MEMORY_BSWAP  have_movbe

diff --git a/tcg/s390x/tcg-target.h b/tcg/s390x/tcg-target.h
index 23e2063667..f423c124a0 100644
--- a/tcg/s390x/tcg-target.h
+++ b/tcg/s390x/tcg-target.h
@@ -171,6 +171,7 @@ extern uint64_t s390_facilities[3];
 #define TCG_TARGET_HAS_MEMORY_BSWAP   1

 #define TCG_TARGET_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD)
+#define TCG_TARGET_SUPPORTS_MCTCG_RVTSO 1

 static inline void tb_target_set_jmp_target(uintptr_t tc_ptr, uintptr_t jmp_rx,
                                             uintptr_t jmp_rw, uintptr_t addr)
--
2.34.1





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